HV: instr_emul: Remove dead code

This patch just removes some dead codes related to Instruction Emulation.

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Kaige Fu 2018-08-02 14:42:43 +08:00 committed by lijinxia
parent f03ae8d09c
commit 820b5e4965
2 changed files with 0 additions and 41 deletions

View File

@ -181,8 +181,6 @@ static const struct instr_emul_vie_op one_byte_opcodes[256] = {
#define VIE_RM_SIB 4U
#define VIE_RM_DISP32 5U
#define GB (1024 * 1024 * 1024)
static uint64_t size2mask[9] = {
[1] = (1UL << 8U) - 1UL,
[2] = (1UL << 16U) - 1UL,
@ -409,32 +407,6 @@ static int vm_set_register(struct vcpu *vcpu, enum cpu_reg_name reg,
return 0;
}
static int vm_set_seg_desc(struct vcpu *vcpu, enum cpu_reg_name seg,
struct seg_desc *desc)
{
int error;
uint32_t base, limit, access;
if ((vcpu == NULL) || (desc == NULL)) {
return -EINVAL;
}
if (!is_segment_register(seg) && !is_descriptor_table(seg)) {
return -EINVAL;
}
error = encode_vmcs_seg_desc(seg, &base, &limit, &access);
if ((error != 0) || (access == 0xffffffffU)) {
return -EINVAL;
}
exec_vmwrite(base, desc->base);
exec_vmwrite32(limit, desc->limit);
exec_vmwrite32(access, desc->access);
return 0;
}
static int vm_get_seg_desc(struct vcpu *vcpu, enum cpu_reg_name seg,
struct seg_desc *desc)
{

View File

@ -135,18 +135,9 @@ struct instr_emul_vie {
#define PSL_AF 0x00000010U /* bcd carry bit */
#define PSL_Z 0x00000040U /* zero bit */
#define PSL_N 0x00000080U /* negative bit */
#define PSL_T 0x00000100U /* trace enable bit */
#define PSL_I 0x00000200U /* interrupt enable bit */
#define PSL_D 0x00000400U /* string instruction direction bit */
#define PSL_V 0x00000800U /* overflow bit */
#define PSL_IOPL 0x00003000U /* i/o privilege level */
#define PSL_NT 0x00004000U /* nested task bit */
#define PSL_RF 0x00010000U /* resume flag bit */
#define PSL_VM 0x00020000U /* virtual 8086 mode bit */
#define PSL_AC 0x00040000U /* alignment checking */
#define PSL_VIF 0x00080000U /* virtual interrupt enable */
#define PSL_VIP 0x00100000U /* virtual interrupt pending */
#define PSL_ID 0x00200000U /* identification bit */
/*
* The 'access' field has the format specified in Table 21-2 of the Intel
@ -165,16 +156,12 @@ struct seg_desc {
/*
* Protections are chosen from these bits, or-ed together
*/
#define PROT_NONE 0x00U /* no permissions */
#define PROT_READ 0x01U /* pages can be read */
#define PROT_WRITE 0x02U /* pages can be written */
#define PROT_EXEC 0x04U /* pages can be executed */
#define SEG_DESC_TYPE(access) ((access) & 0x001fU)
#define SEG_DESC_DPL(access) (((access) >> 5) & 0x3U)
#define SEG_DESC_PRESENT(access) (((access) & 0x0080U) != 0U)
#define SEG_DESC_DEF32(access) (((access) & 0x4000U) != 0U)
#define SEG_DESC_GRANULARITY(access) (((access) & 0x8000U) != 0U)
#define SEG_DESC_UNUSABLE(access) (((access) & 0x10000U) != 0U)
struct vm_guest_paging {