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hv: add fast string enhanced rep movsb/stosb check on initial 

The ACRN suppose the CPU support fast string enhanced rep.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
This commit is contained in:
Li, Fei1 2018-12-17 22:21:58 +08:00 committed by wenlingz
parent 3515ca1e65
commit 78e9a84f39
3 changed files with 27 additions and 0 deletions
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23
hypervisor/arch/x86/cpu.c
View File

@ -78,6 +78,24 @@ static inline bool get_monitor_cap(void)
return false;
}
static inline bool is_fast_string_erms_supported_and_enabled(void)
{
bool ret = false;
uint32_t misc_enable = (uint32_t)msr_read(MSR_IA32_MISC_ENABLE);
if ((misc_enable & MSR_IA32_MISC_ENABLE_FAST_STRING) == 0U) {
pr_fatal("%s, fast string is not enabled\n", __func__);
} else {
if (!cpu_has_cap(X86_FEATURE_ERMS)) {
pr_fatal("%s, enhanced rep movsb/stosb not supported\n", __func__);
} else {
ret = true;
}
}
return ret;
}
static uint64_t get_address_mask(uint8_t limit)
{
return ((1UL << limit) - 1UL) & PAGE_MASK;
@ -222,6 +240,11 @@ static int32_t hardware_detect_support(void)
return -ENODEV;
}
if (!is_fast_string_erms_supported_and_enabled()) {
return -ENODEV;
}
if (!cpu_has_vmx_unrestricted_guest_cap()) {
pr_fatal("%s, unrestricted guest not supported\n", __func__);
return -ENODEV;

1
hypervisor/include/arch/x86/cpufeatures.h
View File

@ -71,6 +71,7 @@
/* Intel-defined CPU features, CPUID level 0x00000007 (EBX)*/
#define X86_FEATURE_TSC_ADJ ((FEAT_7_0_EBX << 5U) + 1U)
#define X86_FEATURE_SMEP ((FEAT_7_0_EBX << 5U) + 7U)
#define X86_FEATURE_ERMS ((FEAT_7_0_EBX << 5U) + 9U)
#define X86_FEATURE_INVPCID ((FEAT_7_0_EBX << 5U) + 10U)
#define X86_FEATURE_SMAP ((FEAT_7_0_EBX << 5U) + 20U)

3
hypervisor/include/arch/x86/msr.h
View File

@ -402,6 +402,9 @@
#define PAT_MEM_TYPE_WB 0x06UL /* writeback */
#define PAT_MEM_TYPE_UCM 0x07UL /* uncached minus */
/* MISC_ENABLE bits: architectural */
#define MSR_IA32_MISC_ENABLE_FAST_STRING (1U << 0U)
#ifndef ASSEMBLER
static inline bool pat_mem_type_invalid(uint64_t x)
{