hv:refine the min address logic of high memory
Current mmu assum the high memory start from 4G,it's not true for some platform. The map logic use "high64_max_ram - 4G" to calculate the high ram size without any check,it's an issue when the platform have no high memory. So this patch add high64_min_ram variable to calculate the min address of high memory and check the high64_min_ram to fix the previou issue. Tracked-On: #6690 Acked-by: Anthony Xu <anthony.xu@intel.com> Signed-off-by: Chenli Wei <chenli.wei@linux.intel.com>
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@ -246,6 +246,7 @@ void init_paging(void)
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uint64_t hv_hva;
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uint32_t i;
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uint64_t low32_max_ram = 0UL;
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uint64_t high64_min_ram = ~0UL;
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uint64_t high64_max_ram = MEM_4G;
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uint64_t top_addr_space = CONFIG_PLATFORM_RAM_SIZE + PLATFORM_LO_MMIO_SIZE;
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@ -270,6 +271,7 @@ void init_paging(void)
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if (end < MEM_4G) {
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low32_max_ram = max(end, low32_max_ram);
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} else {
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high64_min_ram = min(entry->baseaddr, high64_min_ram);
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high64_max_ram = max(end, high64_max_ram);
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}
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}
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@ -279,12 +281,14 @@ void init_paging(void)
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high64_max_ram = min(high64_max_ram, top_addr_space);
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high64_max_ram = round_pde_down(high64_max_ram);
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/* Map [0, low32_max_ram) and [4G, high64_max_ram) RAM regions as WB attribute */
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/* Map [0, low32_max_ram) and [high64_min_ram, high64_max_ram) RAM regions as WB attribute */
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pgtable_add_map((uint64_t *)ppt_mmu_pml4_addr, 0UL, 0UL,
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low32_max_ram, PAGE_ATTR_USER | PAGE_CACHE_WB, &ppt_pgtable);
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pgtable_add_map((uint64_t *)ppt_mmu_pml4_addr, MEM_4G, MEM_4G,
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high64_max_ram - MEM_4G, PAGE_ATTR_USER | PAGE_CACHE_WB, &ppt_pgtable);
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if (high64_max_ram > high64_min_ram) {
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pgtable_add_map((uint64_t *)ppt_mmu_pml4_addr, high64_min_ram, high64_min_ram,
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high64_max_ram - high64_min_ram, PAGE_ATTR_USER | PAGE_CACHE_WB, &ppt_pgtable);
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}
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/* Map [low32_max_ram, 4G) and [HI_MMIO_START, HI_MMIO_END) MMIO regions as UC attribute */
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pgtable_add_map((uint64_t *)ppt_mmu_pml4_addr, low32_max_ram, low32_max_ram,
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MEM_4G - low32_max_ram, PAGE_ATTR_USER | PAGE_CACHE_UC, &ppt_pgtable);
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