hv: lapic: export write_lapic_reg32
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
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471082cc6c
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57152d0f27
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@ -166,15 +166,19 @@ struct lapic_info {
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static struct lapic_info lapic_info;
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static uint32_t read_lapic_reg32(uint32_t offset)
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static inline uint32_t read_lapic_reg32(uint32_t offset)
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{
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ASSERT((offset >= 0x020) && (offset <= 0x3FF), "");
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if (offset < 0x20 || offset > 0x3ff)
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return 0;
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return mmio_read_long(lapic_info.xapic.vaddr + offset);
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}
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static void write_lapic_reg32(uint32_t offset, uint32_t value)
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inline void write_lapic_reg32(uint32_t offset, uint32_t value)
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{
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ASSERT((offset >= 0x020) && (offset <= 0x3FF), "");
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if (offset < 0x20 || offset > 0x3ff)
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return;
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mmio_write_long(value, lapic_info.xapic.vaddr + offset);
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}
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@ -174,16 +174,17 @@ _search_nearest_timer(struct per_cpu_timers *cpu_timer)
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static struct timer*
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_search_timer_by_handle(struct per_cpu_timers *cpu_timer, long handle)
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{
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struct timer *timer;
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struct timer *timer = NULL, *tmp;
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struct list_head *pos;
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list_for_each(pos, &cpu_timer->timer_list) {
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timer = list_entry(pos, struct timer, node);
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if (timer->handle == handle)
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goto FOUND;
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tmp = list_entry(pos, struct timer, node);
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if (tmp->handle == handle) {
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timer = tmp;
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break;
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}
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}
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timer = NULL;
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FOUND:
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return timer;
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}
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@ -296,9 +297,10 @@ static void init_tsc_deadline_timer(void)
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uint32_t val;
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val = VECTOR_TIMER;
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val |= 0x40000; /* TSC deadline and unmask */
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mmio_write_long(val, LAPIC_BASE + LAPIC_LVT_TIMER_REGISTER);
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val |= APIC_LVTT_TM_TSCDLT; /* TSC deadline and unmask */
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write_lapic_reg32(LAPIC_LVT_TIMER_REGISTER, val);
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asm volatile("mfence" : : : "memory");
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/* disarm timer */
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msr_write(MSR_IA32_TSC_DEADLINE, 0UL);
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}
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@ -179,6 +179,7 @@ struct lapic_regs {
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uint32_t tdcr;
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};
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void write_lapic_reg32(uint32_t offset, uint32_t value);
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void save_lapic(struct lapic_regs *regs);
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int early_init_lapic(void);
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int init_lapic(uint32_t cpu_id);
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