hv: vioapic: update remote IRR for lapic-pt
For local APIC passthrough case, EOI would not trigger VM-exit. So virtual 'Remote IRR' would not be updated. Needs to read physical IOxAPIC RTE to update virtual 'Remote IRR' field each time when guest wants to read I/O REDIRECTION TABLE REGISTERS Tracked-On: #5923 Signed-off-by: Fei Li <fei1.li@intel.com>
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@ -209,7 +209,7 @@ vioapic_set_irqline_lock(const struct acrn_vm *vm, uint32_t vgsi, uint32_t opera
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}
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static uint32_t
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vioapic_indirect_read(const struct acrn_single_vioapic *vioapic, uint32_t addr)
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vioapic_indirect_read(struct acrn_single_vioapic *vioapic, uint32_t addr)
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{
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uint32_t regnum, ret = 0U;
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uint32_t pin, pincount = vioapic->chipinfo.nr_pins;
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@ -244,6 +244,23 @@ vioapic_indirect_read(const struct acrn_single_vioapic *vioapic, uint32_t addr)
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if ((addr_offset & 0x1U) != 0U) {
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ret = vioapic->rtbl[pin].u.hi_32;
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} else {
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if (is_lapic_pt_configured(vioapic->vm) && (vioapic->rtbl[pin].bits.trigger_mode != 0UL)) {
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/*
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* For local APIC passthrough case, EOI would not trigger VM-exit. So virtual
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* 'Remote IRR' would not be updated. Needs to read physical IOxAPIC RTE to
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* update virtual 'Remote IRR' field each time when guest wants to read I/O
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* REDIRECTION TABLE REGISTERS
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*/
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struct ptirq_remapping_info *entry = NULL;
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union ioapic_rte phys_rte = {};
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DEFINE_INTX_SID(virt_sid, vioapic->rtbl[pin].bits.vector, INTX_CTLR_IOAPIC);
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entry = find_ptirq_entry(PTDEV_INTR_INTX, &virt_sid, vioapic->vm);
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if (entry != NULL) {
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ioapic_get_rte(entry->allocated_pirq, &phys_rte);
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vioapic->rtbl[pin].bits.remote_irr = phys_rte.bits.remote_irr;
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}
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}
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ret = vioapic->rtbl[pin].u.lo_32;
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}
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}
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