HV: code cleanup as MISRA-C report for guest/vmsr
like: constant of unsigned int need add U/UL as surfix. enum value can't use to give or compare with int directlly. unsigned and signed mis-matched Signed-off-by: Minggui Cao <minggui.cao@intel.com> Reviewed-by: Junjie Mao <junjie.mao@intel.com> Acked-by: Anthony Xu <anthony.xu@intel.com>
This commit is contained in:
Minggui Cao
Jack Ren
parent
8c43ad54bf
commit
4cab8b9cc5
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@ -9,7 +9,7 @@
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#include <multiboot.h>
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#include <reloc.h>
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#define ACRN_DBG_GUEST 6
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#define ACRN_DBG_GUEST 6U
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/* for VM0 e820 */
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uint32_t e820_entries;
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@ -18,7 +18,7 @@ struct e820_mem_params e820_mem;
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struct page_walk_info {
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uint64_t top_entry; /* Top level paging structure entry */
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int level;
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uint32_t level;
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uint32_t width;
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bool is_user_mode;
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bool is_write_access;
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@ -32,7 +32,7 @@ struct page_walk_info {
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inline bool
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is_vm0(struct vm *vm)
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{
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return (vm->attr.boot_idx & 0x7FU) == 0;
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return (vm->attr.boot_idx & 0x7FU) == 0U;
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}
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inline struct vcpu *vcpu_from_vid(struct vm *vm, uint16_t vcpu_id)
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@ -77,7 +77,7 @@ inline struct vcpu *get_primary_vcpu(struct vm *vm)
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inline uint64_t vcpumask2pcpumask(struct vm *vm, uint64_t vdmask)
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{
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uint16_t vcpu_id;
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uint64_t dmask = 0;
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uint64_t dmask = 0UL;
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struct vcpu *vcpu;
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for (vcpu_id = ffs64(vdmask); vcpu_id != INVALID_BIT_INDEX;
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@ -129,8 +129,9 @@ enum vm_paging_mode get_vcpu_paging_mode(struct vcpu *vcpu)
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static int _gva2gpa_common(struct vcpu *vcpu, struct page_walk_info *pw_info,
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uint64_t gva, uint64_t *gpa, uint32_t *err_code)
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{
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int i;
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uint32_t index, shift;
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uint32_t i;
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uint64_t index;
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uint32_t shift;
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uint8_t *base;
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uint64_t entry;
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uint64_t addr, page_size;
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@ -141,7 +142,10 @@ static int _gva2gpa_common(struct vcpu *vcpu, struct page_walk_info *pw_info,
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return -EINVAL;
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addr = pw_info->top_entry;
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for (i = pw_info->level - 1; i >= 0; i--) {
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i = pw_info->level;
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while (i != 0U) {
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i--;
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addr = addr & IA32E_REF_MASK;
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base = GPA2HVA(vcpu->vm, addr);
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if (base == NULL) {
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@ -149,7 +153,7 @@ static int _gva2gpa_common(struct vcpu *vcpu, struct page_walk_info *pw_info,
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goto out;
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}
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shift = (uint32_t) i * pw_info->width + 12U;
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shift = i * pw_info->width + 12U;
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index = (gva >> shift) & ((1UL << pw_info->width) - 1UL);
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page_size = 1UL << shift;
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@ -188,9 +192,9 @@ static int _gva2gpa_common(struct vcpu *vcpu, struct page_walk_info *pw_info,
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entry >>= shift;
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/* shift left 12bit more and back to clear XD/Prot Key/Ignored bits */
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entry <<= (shift + 12);
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entry >>= 12;
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*gpa = entry | (gva & (page_size - 1));
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entry <<= (shift + 12U);
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entry >>= 12U;
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*gpa = entry | (gva & (page_size - 1UL));
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out:
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if (fault != 0) {
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@ -224,7 +228,7 @@ static int _gva2gpa_pae(struct vcpu *vcpu, struct page_walk_info *pw_info,
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goto out;
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}
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pw_info->level = 2;
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pw_info->level = 2U;
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pw_info->top_entry = entry;
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ret = _gva2gpa_common(vcpu, pw_info, gva, gpa, err_code);
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@ -265,24 +269,25 @@ int gva2gpa(struct vcpu *vcpu, uint64_t gva, uint64_t *gpa,
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pw_info.top_entry = cur_context->cr3;
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pw_info.level = pm;
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pw_info.is_write_access = !!(*err_code & PAGE_FAULT_WR_FLAG);
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pw_info.is_inst_fetch = !!(*err_code & PAGE_FAULT_ID_FLAG);
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pw_info.is_write_access = ((*err_code & PAGE_FAULT_WR_FLAG) != 0U);
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pw_info.is_inst_fetch = ((*err_code & PAGE_FAULT_ID_FLAG) != 0U);
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pw_info.is_user_mode = ((exec_vmread(VMX_GUEST_CS_SEL) & 0x3UL) == 3UL);
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pw_info.pse = true;
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pw_info.nxe = cur_context->ia32_efer & MSR_IA32_EFER_NXE_BIT;
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pw_info.wp = !!(cur_context->cr0 & CR0_WP);
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pw_info.nxe =
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((cur_context->ia32_efer & MSR_IA32_EFER_NXE_BIT) != 0UL);
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pw_info.wp = ((cur_context->cr0 & CR0_WP) != 0UL);
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*err_code &= ~PAGE_FAULT_P_FLAG;
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if (pm == PAGING_MODE_4_LEVEL) {
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pw_info.width = 9;
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pw_info.width = 9U;
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ret = _gva2gpa_common(vcpu, &pw_info, gva, gpa, err_code);
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} else if(pm == PAGING_MODE_3_LEVEL) {
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pw_info.width = 9;
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pw_info.width = 9U;
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ret = _gva2gpa_pae(vcpu, &pw_info, gva, gpa, err_code);
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} else if (pm == PAGING_MODE_2_LEVEL) {
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pw_info.width = 10;
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pw_info.pse = !!(cur_context->cr4 & CR4_PSE);
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pw_info.width = 10U;
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pw_info.pse = ((cur_context->cr4 & CR4_PSE) != 0UL);
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pw_info.nxe = false;
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ret = _gva2gpa_common(vcpu, &pw_info, gva, gpa, err_code);
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} else
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@ -296,25 +301,25 @@ int gva2gpa(struct vcpu *vcpu, uint64_t gva, uint64_t *gpa,
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return ret;
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}
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static inline int32_t _copy_gpa(struct vm *vm, void *h_ptr, uint64_t gpa,
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static inline uint32_t _copy_gpa(struct vm *vm, void *h_ptr, uint64_t gpa,
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uint32_t size, uint32_t fix_pg_size, bool cp_from_vm)
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{
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uint64_t hpa;
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uint32_t off_in_pg, len, pg_size;
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uint32_t offset_in_pg, len, pg_size;
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void *g_ptr;
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hpa = _gpa2hpa(vm, gpa, &pg_size);
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if (pg_size == 0U) {
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pr_err("GPA2HPA not found");
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return -EINVAL;
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return 0;
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}
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if (fix_pg_size != 0U)
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pg_size = fix_pg_size;
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off_in_pg = gpa & (pg_size - 1);
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len = (size > pg_size - off_in_pg) ?
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(pg_size - off_in_pg) : size;
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offset_in_pg = (uint32_t)gpa & (pg_size - 1U);
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len = (size > (pg_size - offset_in_pg)) ?
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(pg_size - offset_in_pg) : size;
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g_ptr = HPA2HVA(hpa);
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@ -329,7 +334,6 @@ static inline int32_t _copy_gpa(struct vm *vm, void *h_ptr, uint64_t gpa,
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static inline int copy_gpa(struct vm *vm, void *h_ptr, uint64_t gpa,
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uint32_t size, bool cp_from_vm)
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{
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int32_t ret;
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uint32_t len;
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if (vm == NULL) {
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@ -337,16 +341,15 @@ static inline int copy_gpa(struct vm *vm, void *h_ptr, uint64_t gpa,
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return -EINVAL;
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}
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do {
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ret = _copy_gpa(vm, h_ptr, gpa, size, 0, cp_from_vm);
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if (ret < 0)
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return ret;
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while (size > 0U) {
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len = _copy_gpa(vm, h_ptr, gpa, size, 0U, cp_from_vm);
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if (len == 0U)
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return -EINVAL;
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len = (uint32_t) ret;
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gpa += len;
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h_ptr += len;
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size -= len;
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} while (size > 0U);
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}
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return 0;
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}
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@ -354,7 +357,7 @@ static inline int copy_gpa(struct vm *vm, void *h_ptr, uint64_t gpa,
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static inline int copy_gva(struct vcpu *vcpu, void *h_ptr, uint64_t gva,
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uint32_t size, uint32_t *err_code, bool cp_from_vm)
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{
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uint64_t gpa = 0;
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uint64_t gpa = 0UL;
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int32_t ret;
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uint32_t len;
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@ -367,7 +370,7 @@ static inline int copy_gva(struct vcpu *vcpu, void *h_ptr, uint64_t gva,
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return -EINVAL;
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}
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do {
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while (size > 0U) {
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ret = gva2gpa(vcpu, gva, &gpa, err_code);
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if (ret < 0) {
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pr_err("error[%d] in GVA2GPA, err_code=0x%x",
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@ -375,16 +378,15 @@ static inline int copy_gva(struct vcpu *vcpu, void *h_ptr, uint64_t gva,
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return ret;
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}
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ret = _copy_gpa(vcpu->vm, h_ptr, gpa, size,
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len = _copy_gpa(vcpu->vm, h_ptr, gpa, size,
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PAGE_SIZE_4K, cp_from_vm);
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if (ret < 0)
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return ret;
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if (len == 0U)
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return -EINVAL;
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len = (uint32_t) ret;
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gva += len;
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h_ptr += len;
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size -= len;
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} while (size > 0U);
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}
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return 0;
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}
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@ -569,11 +571,11 @@ static void rebuild_vm0_e820(void)
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int prepare_vm0_memmap_and_e820(struct vm *vm)
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{
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uint32_t i;
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uint32_t attr_wb = (IA32E_EPT_R_BIT |
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uint64_t attr_wb = (IA32E_EPT_R_BIT |
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IA32E_EPT_W_BIT |
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IA32E_EPT_X_BIT |
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IA32E_EPT_WB);
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uint32_t attr_uc = (IA32E_EPT_R_BIT |
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uint64_t attr_uc = (IA32E_EPT_R_BIT |
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IA32E_EPT_W_BIT |
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IA32E_EPT_X_BIT |
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IA32E_EPT_UNCACHED);
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@ -598,7 +600,6 @@ int prepare_vm0_memmap_and_e820(struct vm *vm)
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entry->length, MAP_MEM, attr_wb);
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}
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dev_dbg(ACRN_DBG_GUEST, "VM0 e820 layout:\n");
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for (i = 0U; i < e820_entries; i++) {
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entry = &e820[i];
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@ -613,7 +614,7 @@ int prepare_vm0_memmap_and_e820(struct vm *vm)
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* will cause EPT violation if sos accesses hv memory
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*/
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hv_hpa = get_hv_image_base();
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ept_mmap(vm, hv_hpa, hv_hpa, CONFIG_RAM_SIZE, MAP_UNMAP, 0);
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ept_mmap(vm, hv_hpa, hv_hpa, CONFIG_RAM_SIZE, MAP_UNMAP, 0U);
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return 0;
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}
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@ -623,7 +624,8 @@ uint64_t e820_alloc_low_memory(uint32_t size)
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struct e820_entry *entry, *new_entry;
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/* We want memory in page boundary and integral multiple of pages */
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size = ROUND_PAGE_UP(size);
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size = ((size + CPU_PAGE_SIZE - 1U) >> CPU_PAGE_SHIFT)
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<< CPU_PAGE_SHIFT;
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for (i = 0U; i < e820_entries; i++) {
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entry = &e820[i];
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@ -823,12 +825,12 @@ static const uint64_t guest_init_gdt[] = {
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GUEST_INIT_GDT_DESC_3,
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};
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uint32_t create_guest_init_gdt(struct vm *vm, uint32_t *limit)
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uint64_t create_guest_init_gdt(struct vm *vm, uint32_t *limit)
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{
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void *gtd_addr = GPA2HVA(vm, GUEST_INIT_GDT_START);
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*limit = sizeof(guest_init_gdt) - 1;
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(void)memcpy_s(gtd_addr, 64, guest_init_gdt, sizeof(guest_init_gdt));
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*limit = sizeof(guest_init_gdt) - 1U;
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(void)memcpy_s(gtd_addr, 64U, guest_init_gdt, sizeof(guest_init_gdt));
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return GUEST_INIT_GDT_START;
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};
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@ -43,11 +43,11 @@ static void enable_msr_interception(uint8_t *bitmap, uint32_t msr)
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}
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msr &= 0x1FFFU;
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value = read_map[(msr>>3)];
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value |= 1U<<(msr%8);
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value = read_map[(msr>>3U)];
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value |= 1U<<(msr%8U);
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/* right now we trap for both r/w */
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read_map[(msr>>3)] = value;
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write_map[(msr>>3)] = value;
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read_map[(msr>>3U)] = value;
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write_map[(msr>>3U)] = value;
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}
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/* not used now just leave it for some cases it may be used as API*/
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@ -69,16 +69,16 @@ void disable_msr_interception(uint8_t *bitmap, uint32_t msr)
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}
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msr &= 0x1FFFU;
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value = read_map[(msr>>3)];
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value &= ~(1U<<(msr%8));
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value = read_map[(msr>>3U)];
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value &= ~(1U<<(msr%8U));
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/* right now we trap for both r/w */
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read_map[(msr>>3)] = value;
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write_map[(msr>>3)] = value;
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read_map[(msr>>3U)] = value;
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write_map[(msr>>3U)] = value;
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}
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void init_msr_emulation(struct vcpu *vcpu)
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{
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uint32_t i = 0;
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uint32_t i;
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uint32_t msrs_count = ARRAY_SIZE(emulated_msrs);
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void *msr_bitmap;
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uint64_t value64;
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@ -92,7 +92,7 @@ void init_msr_emulation(struct vcpu *vcpu)
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/* Allocate and initialize memory for MSR bitmap region*/
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vcpu->vm->arch_vm.msr_bitmap = alloc_page();
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ASSERT(vcpu->vm->arch_vm.msr_bitmap != NULL, "");
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(void)memset(vcpu->vm->arch_vm.msr_bitmap, 0x0, CPU_PAGE_SIZE);
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(void)memset(vcpu->vm->arch_vm.msr_bitmap, 0x0U, CPU_PAGE_SIZE);
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msr_bitmap = vcpu->vm->arch_vm.msr_bitmap;
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@ -136,7 +136,7 @@ void init_msr_emulation(struct vcpu *vcpu)
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(uint64_t *)calloc(msrs_count, sizeof(uint64_t));
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ASSERT(vcpu->guest_msrs != NULL, "");
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(void)memset(vcpu->guest_msrs, 0, msrs_count * sizeof(uint64_t));
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(void)memset(vcpu->guest_msrs, 0U, msrs_count * sizeof(uint64_t));
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}
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int rdmsr_vmexit_handler(struct vcpu *vcpu)
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@ -242,8 +242,9 @@ int rdmsr_vmexit_handler(struct vcpu *vcpu)
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/* Store the MSR contents in RAX and RDX */
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vcpu->arch_vcpu.contexts[cur_context].guest_cpu_regs.regs.rax =
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v & 0xffffffff;
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vcpu->arch_vcpu.contexts[cur_context].guest_cpu_regs.regs.rdx = v >> 32;
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v & 0xffffffffU;
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vcpu->arch_vcpu.contexts[cur_context].guest_cpu_regs.regs.rdx =
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v >> 32U;
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TRACE_2L(TRACE_VMEXIT_RDMSR, msr, v);
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@ -259,11 +260,11 @@ int wrmsr_vmexit_handler(struct vcpu *vcpu)
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&vcpu->arch_vcpu.contexts[vcpu->arch_vcpu.cur_context];
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/* Read the MSR ID */
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msr = cur_context->guest_cpu_regs.regs.rcx;
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msr = (uint32_t)cur_context->guest_cpu_regs.regs.rcx;
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/* Get the MSR contents */
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v = (((uint64_t) cur_context->guest_cpu_regs.regs.rdx) << 32) |
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((uint64_t) cur_context->guest_cpu_regs.regs.rax);
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v = (cur_context->guest_cpu_regs.regs.rdx << 32U) |
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cur_context->guest_cpu_regs.regs.rax;
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/* Do the required processing for each msr case */
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switch (msr) {
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@ -18,7 +18,7 @@
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#ifndef BSP_EXTERN_H
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#define BSP_EXTERN_H
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#define UOS_DEFAULT_START_ADDR (0x100000000)
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#define UOS_DEFAULT_START_ADDR (0x100000000UL)
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/**********************************/
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/* EXTERNAL VARIABLES */
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/**********************************/
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@ -17,21 +17,18 @@
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#ifndef ASSEMBLER
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#define foreach_vcpu(idx, vm, vcpu) \
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for (idx = 0, vcpu = vm->hw.vcpu_array[idx]; \
|
||||
for (idx = 0U, vcpu = vm->hw.vcpu_array[idx]; \
|
||||
(idx < vm->hw.num_vcpus) && (vcpu != NULL); \
|
||||
idx++, vcpu = vm->hw.vcpu_array[idx])
|
||||
|
||||
|
||||
/* the index is matched with emulated msrs array*/
|
||||
enum {
|
||||
IDX_TSC_DEADLINE,
|
||||
IDX_BIOS_UPDT_TRIG,
|
||||
IDX_BIOS_SIGN_ID,
|
||||
IDX_TSC,
|
||||
IDX_PAT,
|
||||
|
||||
IDX_MAX_MSR
|
||||
};
|
||||
#define IDX_TSC_DEADLINE 0U
|
||||
#define IDX_BIOS_UPDT_TRIG (IDX_TSC_DEADLINE + 1U)
|
||||
#define IDX_BIOS_SIGN_ID (IDX_BIOS_UPDT_TRIG + 1U)
|
||||
#define IDX_TSC (IDX_BIOS_SIGN_ID + 1U)
|
||||
#define IDX_PAT (IDX_TSC + 1U)
|
||||
#define IDX_MAX_MSR (IDX_PAT + 1U)
|
||||
|
||||
struct vhm_request;
|
||||
|
||||
|
|
@ -128,7 +125,7 @@ int copy_from_gva(struct vcpu *vcpu, void *h_ptr, uint64_t gva,
|
|||
int copy_to_gva(struct vcpu *vcpu, void *h_ptr, uint64_t gva,
|
||||
uint32_t size, uint32_t *err_code);
|
||||
|
||||
uint32_t create_guest_init_gdt(struct vm *vm, uint32_t *limit);
|
||||
uint64_t create_guest_init_gdt(struct vm *vm, uint32_t *limit);
|
||||
|
||||
#ifdef HV_DEBUG
|
||||
void get_req_info(char *str, int str_max);
|
||||
|
|
|
|||
|
|
@ -271,11 +271,11 @@ struct vcpu {
|
|||
#endif
|
||||
};
|
||||
|
||||
#define is_vcpu_bsp(vcpu) ((vcpu)->vcpu_id == 0)
|
||||
#define is_vcpu_bsp(vcpu) ((vcpu)->vcpu_id == 0U)
|
||||
/* do not update Guest RIP for next VM Enter */
|
||||
static inline void vcpu_retain_rip(struct vcpu *vcpu)
|
||||
{
|
||||
(vcpu)->arch_vcpu.inst_len = 0;
|
||||
(vcpu)->arch_vcpu.inst_len = 0U;
|
||||
}
|
||||
|
||||
/* External Interfaces */
|
||||
|
|
|
|||
Loading…
Reference in New Issue