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hv: vlapic: minor fix for update_msr_bitmap_x2apic_apicv 

Shouldn't trap TPR since we always enable "Use TPR shadow"

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
This commit is contained in:
Li, Fei1 2019-03-15 00:04:18 +08:00 committed by Eddie Dong
parent 20164799cb
commit 4a683ed10e
1 changed files with 2 additions and 1 deletions
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3
hypervisor/arch/x86/guest/vmsr.c
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@ -640,10 +640,11 @@ void update_msr_bitmap_x2apic_apicv(const struct acrn_vcpu *vcpu)
* writes to them are virtualized with Register Virtualization
* Refer to Section 29.1 in Intel SDM Vol. 3
*/
enable_msr_interception(msr_bitmap, MSR_IA32_EXT_APIC_TPR, INTERCEPT_DISABLE);
enable_msr_interception(msr_bitmap, MSR_IA32_EXT_APIC_EOI, INTERCEPT_READ);
enable_msr_interception(msr_bitmap, MSR_IA32_EXT_APIC_SELF_IPI, INTERCEPT_READ);
}
enable_msr_interception(msr_bitmap, MSR_IA32_EXT_APIC_TPR, INTERCEPT_DISABLE);
}
/*