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HV:config:Add config to enable logic partition on KBL NUC i7 

In the current design, logic partition scenario is supported
on KBL NUC i7 since there is no related configuration and
no the cooresponding boot loader supporting.
The boot loader supporting is done in the previous patch.

Add some configurations such physical PCI devices information,
virtual e820 table etc for KBL NUC i7 to enable logical
partition scenario.
In the logical partition of KBL NUC i7, there are two
pre-launched VM, this pre-launched VM doesn't support
local APIC passthrough now. The hypervisor is booted through
GRUB.

TODO: In future, Local APIC passthrough and some real time
fetures are needed for the logic partition scenario of KBL
NUC i7.

V5-->V6:
	Update "Tracked-On"

Tracked-On: #2944

Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Xiangyang Wu 2019-04-13 16:24:32 +08:00 committed by ACRN System Integration
parent c4c788ca33
commit 48be6f1fd7
2 changed files with 55 additions and 2 deletions
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20
hypervisor/arch/x86/configs/nuc7i7bnh/pci_devices.h Normal file
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@ -0,0 +1,20 @@
/*
* Copyright (C) 2019 Intel Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef PCI_DEVICES_H_
#define PCI_DEVICES_H_
#define HOST_BRIDGE .pbdf.bits = {.b = 0x00U, .d = 0x00U, .f = 0x00U}
#define SATA_CONTROLLER .pbdf.bits = {.b = 0x00U, .d = 0x17U, .f = 0x00U}
#define USB_CONTROLLER .pbdf.bits = {.b = 0x00U, .d = 0x14U, .f = 0x00U}
#define STORAGE_CONTROLLER_0 SATA_CONTROLLER
#define STORAGE_CONTROLLER_1 USB_CONTROLLER
#define ETHERNET_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x1fU, .f = 0x06U}
#define ETHERNET_CONTROLLER_1
#endif /* PCI_DEVICES_H_ */

37
hypervisor/arch/x86/configs/nuc7i7bnh/ve820.c
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@ -4,13 +4,46 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <e820.h>
#include <vm.h>
#define VE820_ENTRIES_KBL_NUC_i7 5U
static const struct e820_entry ve820_entry[VE820_ENTRIES_KBL_NUC_i7] = {
{ /* usable RAM under 1MB */
.baseaddr = 0x0UL,
.length = 0xF0000UL, /* 960KB */
.type = E820_TYPE_RAM
},
{ /* mptable */
.baseaddr = 0xF0000UL, /* 960KB */
.length = 0x10000UL, /* 16KB */
.type = E820_TYPE_RESERVED
},
{ /* lowmem */
.baseaddr = 0x200000UL, /* 2MB */
.length = 0x1FE00000UL, /* 510MB */
.type = E820_TYPE_RAM
},
{ /* between lowmem and PCI hole */
.baseaddr = 0x20000000UL, /* 512MB */
.length = 0xA0000000UL, /* 2560MB */
.type = E820_TYPE_RESERVED
},
{ /* between PCI hole and 4GB */
.baseaddr = 0xe0000000UL, /* 3.5GB */
.length = 0x20000000UL, /* 512MB */
.type = E820_TYPE_RESERVED
},
};
/**
* @pre vm != NULL
*/
void create_prelaunched_vm_e820(struct acrn_vm *vm)
{
vm->e820_entry_num = 0U;
vm->e820_entries = NULL;
vm->e820_entry_num = VE820_ENTRIES_KBL_NUC_i7;
vm->e820_entries = (struct e820_entry *)ve820_entry;
}