From 40c8c4d3c3e601d48398fd2601fe273309c22d35 Mon Sep 17 00:00:00 2001 From: Zide Chen Date: Wed, 2 May 2018 23:09:19 -0700 Subject: [PATCH] hv: Prepare trampline.S trampoline code relocation in real mode part, add extra pointers for page tables and long jump buffer so it's possible for HV code to patch the relocation offset in long mode part, use absolute addressing when referring HV symbols, and use relative addressing for symbols within trampoline code Signed-off-by: Zheng, Gen Signed-off-by: Jason Chen CJ Signed-off-by: Zide Chen Acked-by: Eddie Dong Acked-by: Xu, Anthony --- hypervisor/arch/x86/trampline.S | 28 +++++++++++++++++++++------- hypervisor/bsp/ld/link_ram.ld.in | 2 +- hypervisor/include/arch/x86/cpu.h | 7 +++++++ 3 files changed, 29 insertions(+), 8 deletions(-) diff --git a/hypervisor/arch/x86/trampline.S b/hypervisor/arch/x86/trampline.S index 10dbfaf58..6081e7936 100644 --- a/hypervisor/arch/x86/trampline.S +++ b/hypervisor/arch/x86/trampline.S @@ -31,6 +31,7 @@ .align 4 .code16 .global trampline_start16 + .org 0 trampline_start16: /* Disable local interrupts */ @@ -82,8 +83,9 @@ trampline_fixup_target: /* Set CR3 to PML4 table address */ - movl $CPU_Boot_Page_Tables_Start, %edi - mov %edi, %cr3 + movl $CPU_Boot_Page_Tables_ptr, %ebx + mov (%ebx), %eax + mov %eax, %cr3 /* Set LME bit in EFER */ @@ -104,7 +106,14 @@ trampline_fixup_target: /* Perform a long jump based to start executing in 64-bit mode */ - data32 ljmp $HOST_GDT_RING0_CODE_SEL, $trampline_start64 + movl $trampline_start64_fixup, %ebx + ljmpl *(%ebx) + + .align 8 + .global trampline_start64_fixup +trampline_start64_fixup: + .long trampline_start64 + .word HOST_GDT_RING0_CODE_SEL .code64 trampline_start64: @@ -119,7 +128,8 @@ trampline_start64: mov %eax, %gs /* Obtain CPU spin-lock to serialize trampline for different APs */ - spinlock_obtain(trampline_spinlock) + mov $trampline_spinlock, %rdi + spinlock_obtain(%rdi) /* Initialize temporary stack pointer NOTE: Using the PML4 memory (PDPT address is top of memory @@ -130,7 +140,7 @@ trampline_start64: used for a VERY short period of time, so this reuse of PML4 memory should be acceptable. */ - movq $trampline_pdpt_addr, %rsp + lea trampline_pdpt_addr(%rip), %rsp /* Push sp magic to top of stack for call trace */ pushq $SP_BOTTOM_MAGIC @@ -139,8 +149,6 @@ trampline_start64: movq main_entry(%rip), %rax jmp %rax -trampline_error: /* should never come here */ - jmp trampline_error /* main entry */ .align 8 @@ -158,17 +166,23 @@ trampline_gdt_end: /* GDT pointer */ .align 2 + .global trampline_gdt_ptr trampline_gdt_ptr: .short (trampline_gdt_end - trampline_gdt) - 1 .quad trampline_gdt /* PML4, PDPT, and PD tables initialized to map first 4 GBytes of memory */ + .align 4 + .global CPU_Boot_Page_Tables_ptr +CPU_Boot_Page_Tables_ptr: + .long CPU_Boot_Page_Tables_Start .align CPU_PAGE_SIZE .global CPU_Boot_Page_Tables_Start CPU_Boot_Page_Tables_Start: .quad trampline_pdpt_addr + (IA32E_COMM_P_BIT | IA32E_COMM_RW_BIT) .align CPU_PAGE_SIZE + .global trampline_pdpt_addr trampline_pdpt_addr: address = 0 .rept 4 diff --git a/hypervisor/bsp/ld/link_ram.ld.in b/hypervisor/bsp/ld/link_ram.ld.in index 83348f447..a8ad4632a 100644 --- a/hypervisor/bsp/ld/link_ram.ld.in +++ b/hypervisor/bsp/ld/link_ram.ld.in @@ -5,7 +5,7 @@ ENTRY(cpu_primary_start_32) MEMORY { /* Low 1MB of memory for secondary processor start-up */ - lowram : ORIGIN = CONFIG_LOW_RAM_START, LENGTH = CONFIG_LOW_RAM_SIZE + lowram : ORIGIN = 0, LENGTH = CONFIG_LOW_RAM_SIZE /* 32 MBytes of RAM for HV */ ram : ORIGIN = CONFIG_RAM_START, LENGTH = CONFIG_RAM_SIZE diff --git a/hypervisor/include/arch/x86/cpu.h b/hypervisor/include/arch/x86/cpu.h index 23553a1be..a3943c6fe 100644 --- a/hypervisor/include/arch/x86/cpu.h +++ b/hypervisor/include/arch/x86/cpu.h @@ -158,10 +158,17 @@ int cpu_find_logical_id(uint32_t lapic_id); /**********************************/ extern const uint8_t _ld_trampline_load[]; extern uint8_t _ld_trampline_start[]; +extern uint8_t _ld_trampline_end[]; extern const uint64_t _ld_trampline_size; extern uint8_t _ld_bss_start[]; extern uint8_t _ld_bss_end[]; +extern uint8_t CPU_Boot_Page_Tables_Start[]; +extern uint8_t CPU_Boot_Page_Tables_ptr[]; +extern uint8_t trampline_pdpt_addr[]; +extern uint8_t trampline_gdt_ptr[]; +extern uint8_t trampline_start64_fixup[]; + extern int ibrs_type; /*