Doc: Grammatical/style edits to split device model page
Signed-off-by: Deb Taylor <deb.taylor@intel.com>
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@ -155,10 +155,10 @@ directly. EPT mapping is not built for these pages having MSI-X table.
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Device configuration emulation
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******************************
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PCI configuration space could been accessed by PCI-compatible Configuration Mechanism
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(IO port 0xCF8/CFC) and PCI Express Enhanced Configuration Access Mechanism (PCI MMCONFIG).
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ACRN hypervisor will trap these PCI configuration space access and emulate it. You may refer
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to :ref:`split-device-model` for detail.
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The PCI configuration space can be accessed by a PCI-compatible
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Configuration Mechanism (IO port 0xCF8/CFC) and the PCI Express Enhanced
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Configuration Access Mechanism (PCI MMCONFIG). The ACRN hypervisor traps
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this PCI configuration space access and emulate it. Refer to :ref:`split-device-model` for details.
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MSI-X table emulation
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*********************
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@ -223,7 +223,7 @@ Remapping of (virtual) PIC interrupts are set up in a similar sequence:
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Initialization of remapping of virtual MSI for Service VM
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This figure illustrates how mappings of MSI or MSIX are set up for
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This figure illustrates how mappings of MSI or MSIX are set up for
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Service VM. Service VM is responsible for issuing a hypercall to notify the
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hypervisor before it configures the PCI configuration space to enable an
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MSI. The hypervisor takes this opportunity to set up a remapping for the
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@ -3,34 +3,35 @@
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Split Device Model
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==================
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We usually emulate device in Device Model. However, we need to emulate device in
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ACRN Hypervisor for some reasons. For example, post-launched RTVM needs to emulate
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pass through PCI(e) devices in ACRN Hypervisor in which case it could continue to
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running even if the Device Model is killed. In spite of this, the Device Model still
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should own the overall resouce management like memroy/MMIO space, interrupt pin etc.
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So there shall be one communication method provided by ACRN Hypervisor, which used
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to align the resource information for Device Model to ACRN Hypervisor emulated device.
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We usually emulate devices in the Device Model. However, in some cases, we
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need to emulate devices in the ACRN Hypervisor. For example, the
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post-launched RTVM needs to emulate passthrough PCI(e) devices in the ACRN
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Hypervisor so that it can continue to run even if the Device Model is
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no longer working. In spite of this, the Device Model still owns the overall
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resource management such as memory/MMIO space, interrupt pin, etc.
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Let's still take the pass through PCI(e) device as an example:
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Before we split pass through PCI(e) device from Device Model to ACRN Hypervisor, the
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whole picture is like this:
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One communication method provided by the ACRN Hypervisor aligns the resource information for the Device Model with the ACRN Hypervisor emulated device.
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Let's take the passthrough PCI(e) device as an example. Before we split
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passthrough PCI(e) devices from the Device Model to the ACRN Hypervisor, the
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whole picture looks like this:
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.. figure:: images/split-dm-image1.png
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:align: center
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:width: 900px
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:name: split-dm-architecture-overview1
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PCI Config space access in Service VM or Pre-launched VM
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PCI Config space access in the Service VM or Pre-launched VM
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.. figure:: images/split-dm-image2.png
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:align: center
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:width: 900px
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:name: split-dm-architecture-overview2
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PCI Config space access in Post-launched VM
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PCI Config space access in the Post-launched VM
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After we split pass through PCI(e) device from Device Model to ACRN Hypervisor, the
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whole picture is like this:
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After we split passthrough PCI(e) devices from the Device Model to the
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ACRN Hypervisor, the whole picture looks like this:
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.. figure:: images/split-dm-image3.png
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:align: center
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@ -42,13 +43,13 @@ whole picture is like this:
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:width: 900px
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:name: split-dm-architecture-overview4
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PCI Config space access in Post-launched VM
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PCI Config space access in the Post-launched VM
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Interfaces Design
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=================
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In order to achieve this, we add a new pair of hypercall to align the PCI(e) BAR
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and INTx information.
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In order to achieve this, we have added a new pair of hypercalls to align
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the PCI(e) BAR and INTx information.
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.. doxygenfunction:: hcall_assign_pcidev
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:project: Project ACRN
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