diff --git a/hypervisor/arch/x86/cpu.c b/hypervisor/arch/x86/cpu.c
index 65eb87dd2..d5d9c45f0 100644
--- a/hypervisor/arch/x86/cpu.c
+++ b/hypervisor/arch/x86/cpu.c
@@ -431,7 +431,7 @@ void bsp_boot_init(void)
 		VMX_MACHINE_T_GUEST_SPEC_CTRL_OFFSET,
 		"run_context ia32_spec_ctrl offset not match");
 
-	bitmap_set(CPU_BOOT_ID, &pcpu_active_bitmap);
+	__bitmap_set(CPU_BOOT_ID, &pcpu_active_bitmap);
 
 	/* Get CPU capabilities thru CPUID, including the physical address bit
 	 * limit which is required for initializing paging.
@@ -533,7 +533,7 @@ void bsp_boot_init(void)
 	start_cpus();
 
 	/* Trigger event to allow secondary CPUs to continue */
-	bitmap_set(0, &pcpu_sync);
+	__bitmap_set(0, &pcpu_sync);
 
 	ASSERT(get_cpu_id() == CPU_BOOT_ID, "");
 
@@ -578,7 +578,7 @@ void cpu_secondary_init(void)
 			      (get_cur_lapic_id()),
 			      CPU_STATE_INITIALIZING);
 
-	bitmap_set(get_cpu_id(), &pcpu_active_bitmap);
+	__bitmap_set(get_cpu_id(), &pcpu_active_bitmap);
 
 	/* Switch to run-time stack */
 	CPU_SP_WRITE(&get_cpu_var(stack)[STACK_SIZE - 1]);
@@ -685,7 +685,7 @@ void cpu_dead(uint32_t logical_id)
 	/* Set state to show CPU is halted */
 	cpu_set_current_state(logical_id, CPU_STATE_HALTED);
 
-	bitmap_clear(get_cpu_id(), &pcpu_active_bitmap);
+	__bitmap_clear(get_cpu_id(), &pcpu_active_bitmap);
 
 	/* Halt the CPU */
 	do {
diff --git a/hypervisor/include/lib/bits.h b/hypervisor/include/lib/bits.h
index d88013680..d11dd30cf 100644
--- a/hypervisor/include/lib/bits.h
+++ b/hypervisor/include/lib/bits.h
@@ -141,68 +141,82 @@ static inline int clz64(unsigned long value)
 	return (63 - fls64(value));
 }
 
-static inline void
-bitmap_set(int mask, unsigned long *bits)
-{
-	/* (*bits) |= (1UL<<mask); */
-	asm volatile(BUS_LOCK "orq %1,%0"
-			:  "+m" (*bits)
-			:  "r" (1UL<<mask)
-			:  "cc", "memory");
+/*
+ * (*addr) |= (1UL<<nr);
+ */
+#define build_bitmap_set(name, lock, nr, addr)		\
+static inline void name(int nr, unsigned long *addr)	\
+{							\
+	asm volatile(lock "orq %1,%0"			\
+			:  "+m" (*addr)			\
+			:  "r" (1UL<<nr)		\
+			:  "cc", "memory");		\
 }
+build_bitmap_set(__bitmap_set, "", nr, addr)
+build_bitmap_set(bitmap_set, BUS_LOCK, nr, addr)
 
-static inline void
-bitmap_clear(int mask, unsigned long *bits)
-{
-	/* (*bits) &= ~(1UL<<mask); */
-	asm volatile(BUS_LOCK "andq %1,%0"
-			:  "+m" (*bits)
-			:  "r" (~(1UL<<mask))
-			:  "cc", "memory");
+/*
+ * (*addr) &= ~(1UL<<nr);
+ */
+#define build_bitmap_clear(name, lock, nr, addr)	\
+static inline void name(int nr, unsigned long *addr)	\
+{							\
+	asm volatile(lock "andq %1,%0"			\
+			:  "+m" (*addr)			\
+			:  "r" (~(1UL<<nr))		\
+			:  "cc", "memory");		\
 }
+build_bitmap_clear(__bitmap_clear, "", nr, addr)
+build_bitmap_clear(bitmap_clear, BUS_LOCK, nr, addr)
 
-static inline bool
-bitmap_test(int mask, unsigned long *bits)
+/*
+ * return !!((*addr) & (1UL<<nr));
+ */
+static inline bool bitmap_test(int nr, unsigned long *addr)
 {
-	/*
-	 * return !!((*bits) & (1UL<<mask));
-	 */
 	int ret;
 
 	asm volatile("btq %2,%1\n\tsbbl %0, %0"
-			: "=r" (ret), "=m" (*bits)
-			: "r" ((long)(mask & 0x3f))
+			: "=r" (ret), "=m" (*addr)
+			: "r" ((long)(nr & 0x3f))
 			: "cc", "memory");
 	return (!!ret);
 }
 
-static inline bool
-bitmap_test_and_set(int mask, unsigned long *bits)
-{
-	int ret;
-
-	asm volatile(BUS_LOCK  "btsq %2,%1\n\tsbbl %0,%0"
-			: "=r" (ret), "=m" (*bits)
-			: "r" ((long)(mask & 0x3f))
-			: "cc", "memory");
-	return (!!ret);
+/*
+ * bool ret = (*addr) & (1UL<<nr);
+ * (*addr) |= (1UL<<nr);
+ * return ret;
+ */
+#define build_bitmap_testandset(name, lock, nr, addr)	\
+static inline bool name(int nr, unsigned long *addr)	\
+{							\
+	int ret;					\
+	asm volatile(lock "btsq %2,%1\n\tsbbl %0,%0"	\
+			: "=r" (ret), "=m" (*addr)	\
+			: "r" ((long)(nr & 0x3f))	\
+			: "cc", "memory");		\
+	return (!!ret);					\
 }
+build_bitmap_testandset(__bitmap_test_and_set, "", nr, addr)
+build_bitmap_testandset(bitmap_test_and_set, BUS_LOCK, nr, addr)
 
-static inline bool
-bitmap_test_and_clear(int mask, unsigned long *bits)
-{
-	/*
-	 *    bool ret = (*bits) & (1UL<<mask);
-	 *    (*bits) &= ~(1UL<<mask);
-	 *    return ret;
-	 */
-	int ret;
-
-	asm volatile(BUS_LOCK  "btrq %2,%1\n\tsbbl %0,%0"
-			: "=r" (ret), "=m" (*bits)
-			: "r" ((long)(mask & 0x3f))
-			: "cc", "memory");
-	return (!!ret);
+/*
+ * bool ret = (*addr) & (1UL<<nr);
+ * (*addr) &= ~(1UL<<nr);
+ * return ret;
+ */
+#define build_bitmap_testandclear(name, lock, nr, addr)	\
+static inline bool name(int nr, unsigned long *addr)	\
+{							\
+	int ret;					\
+	asm volatile(lock "btrq %2,%1\n\tsbbl %0,%0"	\
+			: "=r" (ret), "=m" (*addr)	\
+			: "r" ((long)(nr & 0x3f))	\
+			: "cc", "memory");		\
+	return (!!ret);					\
 }
+build_bitmap_testandclear(__bitmap_test_and_clear, "", nr, addr)
+build_bitmap_testandclear(bitmap_test_and_clear, BUS_LOCK, nr, addr)
 
 #endif /* BITS_H*/