From 2fdd1374a9467427038dc9ef7939a431243ea1cc Mon Sep 17 00:00:00 2001 From: Qian Wang Date: Tue, 27 Oct 2020 15:16:54 +0800 Subject: [PATCH] DM: add vPTCT for post-launched RTVM dm: vptct: add vPTCT for post-launched RTVM We added vPTCT support for post-launched RTVM: 1. Added a function create_and_inject_vptct. Currently, we pass-through the whole pSRAM to one RTVM, so we will also pass- through the PTCT to the very same RTVM. This function will read the native PTCT from SOS and inject it into post- launched VM's vACPI. 2. Added some definitions for vPTCT. Tracked-On: #5330 Signed-off-by: Qian Wang Acked-by: Wang, Yu1 --- devicemodel/core/main.c | 1 + devicemodel/hw/platform/acpi/acpi.c | 70 ++++++++++++++++++++++++++++- devicemodel/include/dm.h | 1 + devicemodel/include/ptct.h | 16 +++++++ 4 files changed, 87 insertions(+), 1 deletion(-) create mode 100644 devicemodel/include/ptct.h diff --git a/devicemodel/core/main.c b/devicemodel/core/main.c index 9e27f4c08..6d4e85a35 100644 --- a/devicemodel/core/main.c +++ b/devicemodel/core/main.c @@ -89,6 +89,7 @@ bool stdio_in_use; bool lapic_pt; bool is_rtvm; bool pt_tpm2; +bool pt_ptct; bool is_winvm; bool skip_pci_mem64bar_workaround = false; diff --git a/devicemodel/hw/platform/acpi/acpi.c b/devicemodel/hw/platform/acpi/acpi.c index 0c25ff555..5d283e1f4 100644 --- a/devicemodel/hw/platform/acpi/acpi.c +++ b/devicemodel/hw/platform/acpi/acpi.c @@ -50,6 +50,8 @@ * DSDT -> 0xf2800 (variable - can go up to 0x100000) */ +#include +#include #include #include #include @@ -69,6 +71,9 @@ #include "vmmapi.h" #include "hpet.h" #include "log.h" +#include "ptct.h" +#include "vhm_ioctl_defs.h" +#include "vmmapi.h" /* * Define the base address of the ACPI tables, and the offsets to @@ -85,7 +90,8 @@ #define FACS_OFFSET 0x3C0 #define NHLT_OFFSET 0x400 #define TPM2_OFFSET 0xC00 -#define DSDT_OFFSET 0xE40 +#define PTCT_OFFSET 0xF00 +#define DSDT_OFFSET 0x1100 #define ASL_TEMPLATE "dm.XXXXXXX" #define ASL_SUFFIX ".aml" @@ -186,6 +192,11 @@ basl_fwrite_rsdt(FILE *fp, struct vmctx *ctx) EFPRINTF(fp, "[0004]\t\tACPI Table Address %u : %08X\n", num++, basl_acpi_base + TPM2_OFFSET); + if (pt_ptct) { + EFPRINTF(fp, "[0004]\t\tACPI Table Address %u : %08X\n", num++, + basl_acpi_base + PTCT_OFFSET); + } + EFFLUSH(fp); return 0; @@ -228,6 +239,11 @@ basl_fwrite_xsdt(FILE *fp, struct vmctx *ctx) EFPRINTF(fp, "[0004]\t\tACPI Table Address %u : 00000000%08X\n", num++, basl_acpi_base + TPM2_OFFSET); + if (pt_ptct) { + EFPRINTF(fp, "[0004]\t\tACPI Table Address %u : 00000000%08X\n", num++, + basl_acpi_base + PTCT_OFFSET); + } + EFFLUSH(fp); return 0; @@ -1064,6 +1080,54 @@ static struct { { basl_fwrite_dsdt, DSDT_OFFSET, true } }; +/* + * So far, only support passthrough native pSRAM to single post-launched VM. + */ +int create_and_inject_vptct(struct vmctx *ctx) +{ +#define PTCT_NATIVE_FILE_PATH_IN_SOS "/sys/firmware/acpi/tables/PTCT" +#define PTCT_BUF_LEN 0x200 /* Otherwise, need to modify DSDT_OFFSET corresponding */ + int native_ptct_fd; + int rc; + size_t native_ptct_len; + size_t vptct_len; + uint8_t buf[PTCT_BUF_LEN] = {0}; + struct vm_memmap memmap = { + .type = VM_MMIO, + .gpa = PSRAM_BASE_GPA, + .hpa = PSRAM_BASE_HPA, + /* TODO: .len should be psram_size+32kb (32kb is for PTCM binary). We also need to modify guest E820 to adapt to real config */ + .len = PSRAM_MAX_SIZE, + .prot = PROT_ALL + }; + + native_ptct_fd = open(PTCT_NATIVE_FILE_PATH_IN_SOS, O_RDONLY); + if (native_ptct_fd < 0){ + pr_err("failed to open /sys/firmware/acpi/tables/PTCT !!!!! errno:%d\n", errno); + return -1; + } + native_ptct_len = lseek(native_ptct_fd, 0, SEEK_END); + if (native_ptct_len > PTCT_BUF_LEN) { + pr_err("%s native_ptct_len = %d large than PTCT_BUF_LEN\n", __func__, native_ptct_len); + return -1; + } + + (void)lseek(native_ptct_fd, 0, SEEK_SET); + rc = read(native_ptct_fd, buf, native_ptct_len); + if (rc < native_ptct_len ){ + pr_err("Native PTCT is not fully read into buf!!!"); + return -1; + } + close(native_ptct_fd); + + vptct_len = native_ptct_len; + + memcpy(vm_map_gpa(ctx, ACPI_BASE + PTCT_OFFSET, vptct_len), buf, vptct_len); + + ioctl(ctx->fd, IC_UNSET_MEMSEG, &memmap); + return ioctl(ctx->fd, IC_SET_MEMSEG, &memmap); +}; + void acpi_table_enable(int num) { @@ -1134,5 +1198,9 @@ acpi_build(struct vmctx *ctx, int ncpu) i++; } + if (pt_ptct) { + create_and_inject_vptct(ctx); + } + return err; } diff --git a/devicemodel/include/dm.h b/devicemodel/include/dm.h index 063bd79ba..192649435 100644 --- a/devicemodel/include/dm.h +++ b/devicemodel/include/dm.h @@ -49,6 +49,7 @@ extern char *mac_seed; extern bool lapic_pt; extern bool is_rtvm; extern bool pt_tpm2; +extern bool pt_ptct; extern bool is_winvm; int vmexit_task_switch(struct vmctx *ctx, struct vhm_request *vhm_req, diff --git a/devicemodel/include/ptct.h b/devicemodel/include/ptct.h new file mode 100644 index 000000000..2df918a9d --- /dev/null +++ b/devicemodel/include/ptct.h @@ -0,0 +1,16 @@ +/* + * Copyright (C) 2020 Intel Corporation. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef PTCT_H +#define PTCT_H + + +/* TODO: Move to high-memory region. */ +#define PSRAM_BASE_HPA 0x40080000UL +#define PSRAM_BASE_GPA 0x40080000UL +#define PSRAM_MAX_SIZE 0x00800000UL + +#endif /* PTCT_H */