hv: vioapic/vpic: clean up spinlock wrappers
remove the following unnecessary spinlock wrappers #define VIOAPIC_LOCK(vioapic) spinlock_obtain(&((vioapic)->mtx)) #define VIOAPIC_UNLOCK(vioapic) spinlock_release(&((vioapic)->mtx)) #define VPIC_LOCK_INIT(vpic) spinlock_init(&((vpic)->lock)) #define VPIC_LOCK(vpic) spinlock_obtain(&((vpic)->lock)) #define VPIC_UNLOCK(vpic) spinlock_release(&((vpic)->lock)) Tracked-On: #861 Signed-off-by: Shiqing Gao <shiqing.gao@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Shiqing Gao
lijinxia
parent
4f20c44ec3
commit
1d2ed1adee
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@ -38,9 +38,6 @@
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#define ACRN_DBG_IOAPIC 6U
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#define ACRN_IOAPIC_VERSION 0x11U
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#define VIOAPIC_LOCK(vioapic) spinlock_obtain(&((vioapic)->mtx))
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#define VIOAPIC_UNLOCK(vioapic) spinlock_release(&((vioapic)->mtx))
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#define IOAPIC_ID_MASK 0x0f000000U
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#define MASK_ALL_INTERRUPTS 0x0001000000010000UL
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#define IOAPIC_RTE_LOW_INTVEC ((uint32_t)IOAPIC_RTE_INTVEC)
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@ -140,7 +137,7 @@ vioapic_set_irqstate(struct vm *vm, uint32_t irq, enum irqstate irqstate)
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vioapic = vm_ioapic(vm);
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VIOAPIC_LOCK(vioapic);
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spinlock_obtain(&(vioapic->mtx));
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switch (irqstate) {
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case IRQSTATE_ASSERT:
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vioapic_set_pinstate(vioapic, pin, true);
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@ -155,7 +152,7 @@ vioapic_set_irqstate(struct vm *vm, uint32_t irq, enum irqstate irqstate)
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default:
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panic("vioapic_set_irqstate: invalid irqstate %d", irqstate);
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}
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VIOAPIC_UNLOCK(vioapic);
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spinlock_release(&(vioapic->mtx));
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}
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void
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@ -192,7 +189,7 @@ vioapic_update_tmr(struct vcpu *vcpu)
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vlapic = vcpu_vlapic(vcpu);
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vioapic = vm_ioapic(vcpu->vm);
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VIOAPIC_LOCK(vioapic);
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spinlock_obtain(&(vioapic->mtx));
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pincount = vioapic_pincount(vcpu->vm);
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for (pin = 0U; pin < pincount; pin++) {
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rte = vioapic->rtbl[pin];
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@ -210,7 +207,7 @@ vioapic_update_tmr(struct vcpu *vcpu)
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vlapic_set_tmr_one_vec(vlapic, delmode, vector, level);
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}
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vlapic_apicv_batch_set_tmr(vlapic);
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VIOAPIC_UNLOCK(vioapic);
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spinlock_release(&(vioapic->mtx));
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}
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static uint32_t
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@ -254,8 +251,9 @@ vioapic_indirect_read(struct acrn_vioapic *vioapic, uint32_t addr)
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return 0;
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}
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/* Due to the race between vcpus, ensure to do VIOAPIC_LOCK(vioapic) &
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* VIOAPIC_UNLOCK(vioapic) by caller.
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/*
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* Due to the race between vcpus, ensure to do spinlock_obtain(&(vioapic->mtx))
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* & spinlock_release(&(vioapic->mtx)) by caller.
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*/
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static void
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vioapic_indirect_write(struct acrn_vioapic *vioapic, uint32_t addr,
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@ -396,7 +394,7 @@ vioapic_mmio_rw(struct acrn_vioapic *vioapic, uint64_t gpa,
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offset = (uint32_t)(gpa - VIOAPIC_BASE);
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VIOAPIC_LOCK(vioapic);
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spinlock_obtain(&(vioapic->mtx));
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/* The IOAPIC specification allows 32-bit wide accesses to the
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* IOAPIC_REGSEL (offset 0) and IOAPIC_WINDOW (offset 16) registers.
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@ -425,7 +423,7 @@ vioapic_mmio_rw(struct acrn_vioapic *vioapic, uint64_t gpa,
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break;
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}
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VIOAPIC_UNLOCK(vioapic);
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spinlock_release(&(vioapic->mtx));
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}
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void
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@ -457,7 +455,7 @@ vioapic_process_eoi(struct vm *vm, uint32_t vector)
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* XXX keep track of the pins associated with this vector instead
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* of iterating on every single pin each time.
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*/
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VIOAPIC_LOCK(vioapic);
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spinlock_obtain(&(vioapic->mtx));
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for (pin = 0U; pin < pincount; pin++) {
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rte = vioapic->rtbl[pin];
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if (((rte.u.lo_32 & IOAPIC_RTE_LOW_INTVEC) != vector) ||
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@ -473,7 +471,7 @@ vioapic_process_eoi(struct vm *vm, uint32_t vector)
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vioapic_send_intr(vioapic, pin);
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}
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}
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VIOAPIC_UNLOCK(vioapic);
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spinlock_release(&(vioapic->mtx));
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}
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void
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@ -29,9 +29,6 @@
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#include <hypervisor.h>
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#define VPIC_LOCK_INIT(vpic) spinlock_init(&((vpic)->lock))
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#define VPIC_LOCK(vpic) spinlock_obtain(&((vpic)->lock))
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#define VPIC_UNLOCK(vpic) spinlock_release(&((vpic)->lock))
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/* TODO: add spinlock_locked support? */
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/*#define VPIC_LOCKED(vpic) spinlock_locked(&((vpic)->lock))*/
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@ -471,7 +468,7 @@ static void vpic_set_irqstate(struct vm *vm, uint32_t irq,
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return;
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}
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VPIC_LOCK(vpic);
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spinlock_obtain(&(vpic->lock));
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switch (irqstate) {
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case IRQSTATE_ASSERT:
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vpic_set_pinstate(vpic, pin, true);
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@ -486,7 +483,7 @@ static void vpic_set_irqstate(struct vm *vm, uint32_t irq,
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default:
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ASSERT(false, "vpic_set_irqstate: invalid irqstate");
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}
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VPIC_UNLOCK(vpic);
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spinlock_release(&(vpic->lock));
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}
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/* hypervisor interface: assert/deassert/pulse irq */
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@ -539,7 +536,7 @@ void vpic_pending_intr(struct vm *vm, uint32_t *vecptr)
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i8259 = &vpic->i8259[0];
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VPIC_LOCK(vpic);
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spinlock_obtain(&(vpic->lock));
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pin = vpic_get_highest_irrpin(i8259);
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if (pin == 2U) {
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@ -553,7 +550,7 @@ void vpic_pending_intr(struct vm *vm, uint32_t *vecptr)
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*/
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if (pin >= NR_VPIC_PINS_PER_CHIP) {
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*vecptr = VECTOR_INVALID;
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VPIC_UNLOCK(vpic);
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spinlock_release(&(vpic->lock));
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return;
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}
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@ -561,7 +558,7 @@ void vpic_pending_intr(struct vm *vm, uint32_t *vecptr)
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dev_dbg(ACRN_DBG_PIC, "Got pending vector 0x%x\n", *vecptr);
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VPIC_UNLOCK(vpic);
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spinlock_release(&(vpic->lock));
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}
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static void vpic_pin_accepted(struct i8259_reg_state *i8259, uint8_t pin)
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@ -589,7 +586,7 @@ void vpic_intr_accepted(struct vm *vm, uint32_t vector)
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vpic = vm_pic(vm);
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VPIC_LOCK(vpic);
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spinlock_obtain(&(vpic->lock));
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pin = (uint8_t)(vector & 0x7U);
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@ -606,7 +603,7 @@ void vpic_intr_accepted(struct vm *vm, uint32_t vector)
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vpic_notify_intr(vpic);
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VPIC_UNLOCK(vpic);
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spinlock_release(&(vpic->lock));
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}
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static int vpic_read(struct acrn_vpic *vpic, struct i8259_reg_state *i8259,
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@ -614,7 +611,7 @@ static int vpic_read(struct acrn_vpic *vpic, struct i8259_reg_state *i8259,
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{
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uint8_t pin;
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VPIC_LOCK(vpic);
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spinlock_obtain(&(vpic->lock));
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if (i8259->poll) {
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i8259->poll = false;
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@ -640,7 +637,7 @@ static int vpic_read(struct acrn_vpic *vpic, struct i8259_reg_state *i8259,
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}
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}
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VPIC_UNLOCK(vpic);
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spinlock_release(&(vpic->lock));
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return 0;
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}
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@ -654,7 +651,7 @@ static int vpic_write(struct acrn_vpic *vpic, struct i8259_reg_state *i8259,
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error = 0;
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val = (uint8_t)*eax;
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VPIC_LOCK(vpic);
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spinlock_obtain(&(vpic->lock));
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if ((port & ICU_IMR_OFFSET) != 0U) {
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switch (i8259->icw_num) {
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@ -689,7 +686,7 @@ static int vpic_write(struct acrn_vpic *vpic, struct i8259_reg_state *i8259,
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vpic_notify_intr(vpic);
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}
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VPIC_UNLOCK(vpic);
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spinlock_release(&(vpic->lock));
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return error;
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}
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@ -793,7 +790,7 @@ static int vpic_elc_handler(struct vm *vm, bool in, uint16_t port, size_t bytes,
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return -1;
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}
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VPIC_LOCK(vpic);
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spinlock_obtain(&(vpic->lock));
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if (in) {
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if (is_master) {
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@ -819,7 +816,7 @@ static int vpic_elc_handler(struct vm *vm, bool in, uint16_t port, size_t bytes,
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}
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}
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VPIC_UNLOCK(vpic);
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spinlock_release(&(vpic->lock));
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return 0;
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}
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@ -880,5 +877,5 @@ void vpic_init(struct vm *vm)
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vm->arch_vm.vpic.i8259[0].mask = 0xffU;
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vm->arch_vm.vpic.i8259[1].mask = 0xffU;
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VPIC_LOCK_INIT(vpic);
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spinlock_init(&(vpic->lock));
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}
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