HV:treewide:Update return type for bit operations fls and clz

Change the return type of function fls and clz as uint16_t;
When the input is zero, INVALID_BIT_INDEX is returned;
Update temporary variable type and return value check of caller
when it call fls or clz;
When input value is zero, clz returns 32 directly.

V1-->V2:
        INVALID_BIT_INDEX instead of INVALID_NUMBER;
        Add type conversion as needed;
        Add "U/UL" for constant value as needed;
        Codeing style fixing.
V2-->V3:
       Use type conversion to remove side effect of
       the variable which stores fls/clz return value;
       fls return INVALID_BIT_INDEX directly when the
       input value is zero.
V3-->v4:
       Clean up comments for fls.

Note: For instruction "bsrl", destination register value
      is undefined when source register value is zero.

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>

hypervisor/arch/x86/guest/vlapic.c

@@ -767,25 +767,26 @@ vlapic_process_eoi(struct vlapic *vlapic)
 {
 	struct lapic_regs *lapic = vlapic->apic_page;
 	struct lapic_reg *isrptr, *tmrptr;
-	int i, bitpos, vector;
+	int i, vector;
+	uint16_t bitpos;
 
 	isrptr = &lapic->isr[0];
 	tmrptr = &lapic->tmr[0];
 
 	for (i = 7; i >= 0; i--) {
 		bitpos = fls(isrptr[i].val);
-		if (bitpos >= 0) {
+		if (bitpos != INVALID_BIT_INDEX) {
 			if (vlapic->isrvec_stk_top <= 0) {
 				panic("invalid vlapic isrvec_stk_top %d",
 					vlapic->isrvec_stk_top);
 			}
-			isrptr[i].val &= ~(1 << bitpos);
+			isrptr[i].val &= ~(1U << (uint32_t)bitpos);
-			vector = i * 32 + bitpos;
+			vector = i * 32 + (int32_t)bitpos;
 			dev_dbg(ACRN_DBG_LAPIC, "EOI vector %d", vector);
 			VLAPIC_CTR_ISR(vlapic, "vlapic_process_eoi");
 			vlapic->isrvec_stk_top--;
 			vlapic_update_ppr(vlapic);
-			if ((tmrptr[i].val & (1 << bitpos)) != 0) {
+			if ((tmrptr[i].val & (1U << (uint32_t)bitpos)) != 0U) {
 				/* hook to vIOAPIC */
 				vioapic_process_eoi(vlapic->vm, vector);
 			}
@@ -1131,7 +1132,8 @@ int
 vlapic_pending_intr(struct vlapic *vlapic, uint32_t *vecptr)
 {
 	struct lapic_regs *lapic = vlapic->apic_page;
-	int i, bitpos;
+	int i;
+	uint16_t bitpos;
 	uint32_t vector;
 	uint32_t val;
 	struct lapic_reg *irrptr;
@@ -1144,8 +1146,8 @@ vlapic_pending_intr(struct vlapic *vlapic, uint32_t *vecptr)
 	for (i = 7; i >= 0; i--) {
 		val = atomic_load((int *)&irrptr[i].val);
 		bitpos = fls(val);
-		if (bitpos >= 0) {
+		if (bitpos != INVALID_BIT_INDEX) {
-			vector = i * 32 + bitpos;
+			vector = (uint32_t)(i * 32) + (uint32_t)bitpos;
 			if (PRIO(vector) > PRIO(lapic->ppr)) {
 				if (vecptr != NULL)
 					*vecptr = vector;

hypervisor/include/lib/bits.h

@@ -31,6 +31,14 @@
 #define BITS_H
 
 #define	BUS_LOCK	"lock ; "
+/**
+ *
+ * INVALID_BIT_INDEX means when input paramter is zero,
+ * bit operations function can't find bit set and return
+ * the invalid bit index directly.
+ *
+ **/
+#define INVALID_BIT_INDEX  0xffffU
 
 /**
  *
@@ -38,28 +46,32 @@
  *       return the bit index of that bit.
  *
  *  Bits are numbered starting at 0,the least significant bit.
- *  A return value of -1 means that the argument was zero.
+ *  A return value of INVALID_BIT_INDEX means return value is
+ *  invalid bit index when the input argument was zero.
  *
  *  Examples:
- *	fls (0x0) = -1
+ *	fls (0x0) = INVALID_BIT_INDEX
  *	fls (0x01) = 0
- *	fls (0xf0) = 7
+ *	fls (0x80) = 7
  *	...
  *	fls (0x80000001) = 31
  *
- * @param value: 'unsigned int' type value
+ * @param value: 'uint32_t' type value
  *
- * @return value: zero-based bit index, -1 means 'value' was zero.
+ * @return value: zero-based bit index, INVALID_BIT_INDEX means
+ * when 'value' was zero, bit operations function can't find bit
+ * set and return the invalid bit index directly.
  *
  * **/
-static inline int fls(unsigned int value)
+static inline uint16_t fls(uint32_t value)
 {
-	int ret;
+	uint32_t ret = 0U;
-
+	if (value == 0U)
+		return (INVALID_BIT_INDEX);
 	asm volatile("bsrl %1,%0"
 			: "=r" (ret)
-			: "rm" (value), "0" (-1));
+			: "rm" (value));
-	return ret;
+	return (uint16_t)ret;
 }
 
 static inline int fls64(unsigned long value)
@@ -124,9 +136,13 @@ static inline int ffz64(unsigned long value)
  *
  * @return The number of leading zeros in 'value'.
  */
-static inline int clz(unsigned int value)
+static inline uint16_t clz(uint32_t value)
 {
-	return (31 - fls(value));
+	if (value == 0U)
+		return 32U;
+	else{
+		return (31U - fls(value));
+	}
 }
 
 /**

hypervisor/lib/div.c

@@ -16,7 +16,7 @@ static int do_udiv32(uint32_t dividend, uint32_t divisor,
 	 * are valid * clz(dividend)<=clz(divisor)
 	 */
 
-	mask = clz(divisor) - clz(dividend);
+	mask = (uint32_t)(clz(divisor) - clz(dividend));
 	/* align divisor and dividend */
 	divisor <<= mask;
 	mask = 1U << mask;
@@ -26,8 +26,8 @@ static int do_udiv32(uint32_t dividend, uint32_t divisor,
 			dividend -= divisor;
 			res->q.dwords.low |= mask;
 		}
-		divisor >>= 1;
+		divisor >>= 1U;
-	} while (((mask >>= 1) != 0) && (dividend != 0));
+	} while (((mask >>= 1U) != 0U) && (dividend != 0U));
 	/* dividend now contains the reminder */
 	res->r.dwords.low = dividend;
 	return 0;