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HV: cycomatic complexity 20 in vlapic_icrlo_write_handler 

MISRA compaint that the vlapic_icrlo_write_handler 's cyclomatic
complexity is greater than 20. Try to remove multiple returns/exits.

Tracked-On: #861
Signed-off-by: Chaohong guo <chaohong.guo@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Chaohong guo 2018-12-21 11:03:15 +08:00 committed by wenlingz
parent eaa0e307b7
commit 0884397361
1 changed files with 52 additions and 54 deletions
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106
hypervisor/arch/x86/guest/vlapic.c
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@ -1229,6 +1229,7 @@ vlapic_icrlo_write_handler(struct acrn_vlapic *vlapic)
{ {
uint16_t vcpu_id; uint16_t vcpu_id;
bool phys; bool phys;
int32_t ret = 0;
uint64_t dmask = 0UL; uint64_t dmask = 0UL;
uint32_t icr_low, icr_high, dest; uint32_t icr_low, icr_high, dest;
uint32_t vec, mode, shorthand; uint32_t vec, mode, shorthand;
@ -1253,68 +1254,65 @@ vlapic_icrlo_write_handler(struct acrn_vlapic *vlapic)
if ((mode == APIC_DELMODE_FIXED) && (vec < 16U)) { if ((mode == APIC_DELMODE_FIXED) && (vec < 16U)) {
vlapic_set_error(vlapic, APIC_ESR_SEND_ILLEGAL_VECTOR); vlapic_set_error(vlapic, APIC_ESR_SEND_ILLEGAL_VECTOR);
dev_dbg(ACRN_DBG_LAPIC, "Ignoring invalid IPI %u", vec); dev_dbg(ACRN_DBG_LAPIC, "Ignoring invalid IPI %u", vec);
return 0; } else if (((shorthand == APIC_DEST_SELF) || (shorthand == APIC_DEST_ALLISELF))
} && ((mode == APIC_DELMODE_NMI) || (mode == APIC_DELMODE_INIT)
|| (mode == APIC_DELMODE_STARTUP))) {
dev_dbg(ACRN_DBG_LAPIC, "Invalid ICR value");
} else {
dev_dbg(ACRN_DBG_LAPIC, dev_dbg(ACRN_DBG_LAPIC,
"icrlo 0x%08x icrhi 0x%08x triggered ipi %u", "icrlo 0x%08x icrhi 0x%08x triggered ipi %u",
icr_low, icr_high, vec); icr_low, icr_high, vec);
if (((shorthand == APIC_DEST_SELF) || (shorthand == APIC_DEST_ALLISELF)) switch (shorthand) {
&& ((mode == APIC_DELMODE_NMI) || (mode == APIC_DELMODE_INIT) case APIC_DEST_DESTFLD:
|| (mode == APIC_DELMODE_STARTUP))) { vlapic_calcdest(vlapic->vm, &dmask, dest, phys, false);
dev_dbg(ACRN_DBG_LAPIC, "Invalid ICR value"); break;
return 0; case APIC_DEST_SELF:
} bitmap_set_lock(vlapic->vcpu->vcpu_id, &dmask);
break;
case APIC_DEST_ALLISELF:
dmask = vm_active_cpus(vlapic->vm);
break;
case APIC_DEST_ALLESELF:
dmask = vm_active_cpus(vlapic->vm);
bitmap_clear_lock(vlapic->vcpu->vcpu_id, &dmask);
break;
default:
/*
* All possible values of 'shorthand' has been handled in prior
* case clauses.
*/
break;
}
switch (shorthand) { for (vcpu_id = 0U; vcpu_id < vlapic->vm->hw.created_vcpus; vcpu_id++) {
case APIC_DEST_DESTFLD: if ((dmask & (1UL << vcpu_id)) != 0UL) {
vlapic_calcdest(vlapic->vm, &dmask, dest, phys, false); target_vcpu = vcpu_from_vid(vlapic->vm, vcpu_id);
break;
case APIC_DEST_SELF:
bitmap_set_lock(vlapic->vcpu->vcpu_id, &dmask);
break;
case APIC_DEST_ALLISELF:
dmask = vm_active_cpus(vlapic->vm);
break;
case APIC_DEST_ALLESELF:
dmask = vm_active_cpus(vlapic->vm);
bitmap_clear_lock(vlapic->vcpu->vcpu_id, &dmask);
break;
default:
/*
* All possible values of 'shorthand' has been handled in prior
* case clauses.
*/
break;
}
for (vcpu_id = 0U; vcpu_id < vlapic->vm->hw.created_vcpus; vcpu_id++) { if (mode == APIC_DELMODE_FIXED) {
if ((dmask & (1UL << vcpu_id)) != 0UL) { vlapic_set_intr(target_vcpu, vec, LAPIC_TRIG_EDGE);
target_vcpu = vcpu_from_vid(vlapic->vm, vcpu_id); dev_dbg(ACRN_DBG_LAPIC,
"vlapic sending ipi %u to vcpu_id %hu",
if (mode == APIC_DELMODE_FIXED) { vec, vcpu_id);
vlapic_set_intr(target_vcpu, vec, LAPIC_TRIG_EDGE); } else if (mode == APIC_DELMODE_NMI) {
dev_dbg(ACRN_DBG_LAPIC, vcpu_inject_nmi(target_vcpu);
"vlapic sending ipi %u to vcpu_id %hu", dev_dbg(ACRN_DBG_LAPIC,
vec, vcpu_id); "vlapic send ipi nmi to vcpu_id %hu", vcpu_id);
} else if (mode == APIC_DELMODE_NMI) { } else if (mode == APIC_DELMODE_INIT) {
vcpu_inject_nmi(target_vcpu); vlapic_process_init_sipi(target_vcpu, mode, icr_low, vcpu_id);
dev_dbg(ACRN_DBG_LAPIC, } else if (mode == APIC_DELMODE_STARTUP) {
"vlapic send ipi nmi to vcpu_id %hu", vcpu_id); vlapic_process_init_sipi(target_vcpu, mode, icr_low, vcpu_id);
} else if (mode == APIC_DELMODE_INIT) { } else if (mode == APIC_DELMODE_SMI) {
vlapic_process_init_sipi(target_vcpu, mode, icr_low, vcpu_id); pr_info("vlapic: SMI IPI do not support\n");
} else if (mode == APIC_DELMODE_STARTUP) { } else {
vlapic_process_init_sipi(target_vcpu, mode, icr_low, vcpu_id); pr_err("Unhandled icrlo write with mode %u\n", mode);
} else if (mode == APIC_DELMODE_SMI) { }
pr_info("vlapic: SMI IPI do not support\n");
} else {
pr_err("Unhandled icrlo write with mode %u\n", mode);
} }
} }
} }
return 0; /* handled completely in the kernel */ return ret; /* handled completely in the kernel */
} }
/** /**