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hv: cpu_cap: PAW over 39 bits must support 1GB large page 

The platform which physical-address width over 39 bits must support
1GB large page (Both MMU and VMX sides ). This could save lots of
page table pages for EPT MMIO mapping.

Tracked-On: #5929
Signed-off-by: Li Fei1 <fei1.li@intel.com>
This commit is contained in:
Li Fei1 2021-04-20 14:25:23 +08:00 committed by wenlingz
parent affe858d02
commit 053c09e764
1 changed files with 5 additions and 0 deletions
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5
hypervisor/arch/x86/cpu_caps.c
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@ -462,6 +462,11 @@ int32_t detect_hardware_support(void)
printf("%s, physical-address width (%d) over maximum physical-address width (%d)\n",
__func__, boot_cpu_data.phys_bits, MAXIMUM_PA_WIDTH);
ret = -ENODEV;
} else if ((boot_cpu_data.phys_bits > 39U) && (!pcpu_has_cap(X86_FEATURE_PAGE1GB) ||
!pcpu_has_vmx_ept_cap(VMX_EPT_1GB_PAGE))) {
printf("%s, physical-address width %d over 39 bits must support 1GB large page\n",
__func__, boot_cpu_data.phys_bits);
ret = -ENODEV;
} else if (!pcpu_has_cap(X86_FEATURE_INVA_TSC)) {
/* check invariant TSC */
printf("%s, invariant TSC not supported\n", __func__);