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Revert "config-tools: change 'DISABLED' settings to 'ENABLED'" 

This reverts commit 21d10af9d5.
This commit is contained in:
szhen11 2022-08-18 16:21:34 +08:00
parent eb2cffd48f
commit 03905be20f
3 changed files with 13 additions and 16 deletions
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3
misc/config_tools/scenario_config/upgrader.py
View File

@ -764,9 +764,6 @@ class ScenarioUpgrader(ScenarioTransformer):
# Feature enabling or disabling
"vuart0": partialmethod(move_enablement, ".//vuart0"),
"vbootloader": partialmethod(move_enablement, ".//vbootloader", values_as_enabled = ["ovmf", "Enable"], values_as_disabled = ["no", "Disable"]),
"MCE_ON_PSC_ENABLED": partialmethod(move_enablement, ".//MCE_ON_PSC_DISABLED", values_as_enabled = ["n"], values_as_disabled = ["y"]),
"SPLIT_LOCK_DETECTION_ENABLED": partialmethod(move_enablement, ".//ENFORCE_TURNOFF_AC", values_as_enabled = ["n"], values_as_disabled = ["y"]),
"UC_LOCK_DETECTION_ENABLED": partialmethod(move_enablement, ".//ENFORCE_TURNOFF_GP", values_as_enabled = ["n"], values_as_disabled = ["y"]),
# Intermediate nodes
"pci_devs": partialmethod(create_node_if, ".//pci_devs", ".//passthrough_devices/*[text() != ''] | .//sriov/*[text() != '']"),

18
misc/config_tools/schema/config.xsd
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@ -58,14 +58,14 @@
<xs:documentation>Enable multiboot2 protocol support (with multiboot1 downward compatibility). If multiboot1 meets your requirements, disable this feature to reduce hypervisor code size.</xs:documentation>
</xs:annotation>
</xs:element>
<xs:element name="SPLIT_LOCK_DETECTION_ENABLED" type="Boolean" default="n">
<xs:annotation acrn:title="Enable split lock detection" acrn:views="advanced">
<xs:documentation>Enable detection of split locks. A split lock can negatively affect an application's real-time performance. If a lock is detected, an alignment check exception #AC occurs.</xs:documentation>
<xs:element name="ENFORCE_TURNOFF_AC" type="Boolean" default="y">
<xs:annotation acrn:title="Disable split lock detection" acrn:views="advanced">
<xs:documentation>Disable detection of split locks. A split lock can negatively affect an application's real-time performance. If a lock is detected, an alignment check exception #AC occurs.</xs:documentation>
</xs:annotation>
</xs:element>
<xs:element name="UC_LOCK_DETECTION_ENABLED" type="Boolean" default="y">
<xs:annotation acrn:title="Enable UC lock detection" acrn:views="advanced">
<xs:documentation>Enable detection of uncacheable-memory (UC) locks. A UC lock can negatively affect an application's real-time performance. If a lock is detected, a general-protection exception #GP occurs.</xs:documentation>
<xs:element name="ENFORCE_TURNOFF_GP" type="Boolean" default="n">
<xs:annotation acrn:title="Disable UC lock detection" acrn:views="advanced">
<xs:documentation>Disable detection of uncacheable-memory (UC) locks. A UC lock can negatively affect an application's real-time performance. If a lock is detected, a general-protection exception #GP occurs.</xs:documentation>
</xs:annotation>
</xs:element>
<xs:element name="SECURITY_VM_FIXUP" type="Boolean" default="n">
@ -109,9 +109,9 @@ If your VM is not a security VM, leave this option unchecked. </xs:documentation
<xs:documentation>Enable L1 cache flush before VM entry to prevent L1 terminal fault. L1 terminal fault is a hardware vulnerability that could allow unauthorized disclosure of information residing in the L1 data cache.</xs:documentation>
</xs:annotation>
</xs:element>
<xs:element name="MCE_ON_PSC_ENABLED" type="Boolean" default="y">
<xs:annotation acrn:title="Enable MCE workaround" acrn:views="advanced">
<xs:documentation>Enable the software workaround for Machine Check Error on Page Size Change (erratum in some processor families). For more information about this workaround and affected processors, see this `MCE Avoidance on Page Size Change White Paper &lt;https://www.intel.com/content/www/us/en/developer/articles/troubleshooting/software-security-guidance/technical-documentation/machine-check-error-avoidance-page-size-change.html&gt;`_.</xs:documentation>
<xs:element name="MCE_ON_PSC_DISABLED" type="Boolean" default="n">
<xs:annotation acrn:title="Disable MCE workaround" acrn:views="advanced">
<xs:documentation>Disable the software workaround for Machine Check Error on Page Size Change (erratum in some processor families). For more information about this workaround and affected processors, see this `MCE Avoidance on Page Size Change White Paper &lt;https://www.intel.com/content/www/us/en/developer/articles/troubleshooting/software-security-guidance/technical-documentation/machine-check-error-avoidance-page-size-change.html&gt;`_.</xs:documentation>
</xs:annotation>
</xs:element>
<xs:element name="RDT" type="RDTType">

8
misc/config_tools/xforms/config_common.xsl
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@ -73,11 +73,11 @@
</xsl:call-template>
<xsl:call-template name="boolean-by-key">
<xsl:with-param name="key" select="'SPLIT_LOCK_DETECTION_ENABLED'" />
<xsl:with-param name="key" select="'ENFORCE_TURNOFF_AC'" />
</xsl:call-template>
<xsl:call-template name="boolean-by-key">
<xsl:with-param name="key" select="'UC_LOCK_DETECTION_ENABLED'" />
<xsl:with-param name="key" select="'ENFORCE_TURNOFF_GP'" />
</xsl:call-template>
<xsl:call-template name="boolean-by-key">
@ -124,8 +124,8 @@
</xsl:call-template>
<xsl:call-template name="boolean-by-key-value">
<xsl:with-param name="key" select="'MCE_ON_PSC_WORKAROUND_ENABLED'" />
<xsl:with-param name="value" select="MCE_ON_PSC_ENABLED" />
<xsl:with-param name="key" select="'MCE_ON_PSC_WORKAROUND_DISABLED'" />
<xsl:with-param name="value" select="MCE_ON_PSC_DISABLED" />
</xsl:call-template>
<xsl:call-template name="boolean-by-key-value">