65 lines
2.5 KiB
C
65 lines
2.5 KiB
C
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/*
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* Copyright (C) 2018 Intel Corporation. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef ZEROPAGE_H
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#define ZEROPAGE_H
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struct zero_page {
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uint8_t pad1[0x1e8]; /* 0x000 */
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uint8_t e820_nentries; /* 0x1e8 */
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uint8_t pad2[0x8]; /* 0x1e9 */
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struct {
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uint8_t setup_sects; /* 0x1f1 */
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uint8_t hdr_pad1[0x1e]; /* 0x1f2 */
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uint8_t loader_type; /* 0x210 */
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uint8_t load_flags; /* 0x211 */
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uint8_t hdr_pad2[0x6]; /* 0x212 */
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uint32_t ramdisk_addr; /* 0x218 */
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uint32_t ramdisk_size; /* 0x21c */
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uint8_t hdr_pad3[0x8]; /* 0x220 */
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uint32_t bootargs_addr; /* 0x228 */
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uint8_t hdr_pad4[0x8]; /* 0x22c */
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uint8_t relocatable_kernel; /* 0x234 */
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uint8_t hdr_pad5[0x13]; /* 0x235 */
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uint32_t payload_offset;/* 0x248 */
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uint32_t payload_length;/* 0x24c */
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uint8_t hdr_pad6[0x8]; /* 0x250 */
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uint64_t pref_addr; /* 0x258 */
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uint8_t hdr_pad7[8]; /* 0x260 */
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} __packed hdr;
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uint8_t pad3[0x68]; /* 0x268 */
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struct e820_entry e820[0x80]; /* 0x2d0 */
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uint8_t pad4[0x330]; /* 0xcd0 */
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} __packed;
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#endif
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