2020-08-24 08:05:46 +08:00
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/*
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* Copyright (C) 2020 Intel Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef BOARD_INFO_H
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#define BOARD_INFO_H
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#define MAX_PCPU_NUM 4U
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acrn-config: update missing or outdated configuration source code
so that vm_configurations.h/vm_configurations.c are consistent for
same scenario
Upload configuration source code for:
Board scenarios
whl-ipc-i5 industry, hybrid, hybrid_rt, logical_partiton
whl-ipc-i7 industry, hybrid, hybrid_rt, logical_partiton
ehl-crb-b industry, hybrid, hybrid_rt, logical_partition
nuc7i7dnb industry, hybrid, logical_partition
Tracked-On: #5229
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
2020-09-11 06:24:42 +08:00
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#define MAX_VMSIX_ON_MSI_PDEVS_NUM 5U
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2020-08-24 08:05:46 +08:00
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#define MAX_HIDDEN_PDEVS_NUM 0U
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#define HI_MMIO_START ~0UL
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#define HI_MMIO_END 0UL
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#define HI_MMIO_SIZE 0x10000000UL
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acrn-config: update missing or outdated configuration source code
so that vm_configurations.h/vm_configurations.c are consistent for
same scenario
Upload configuration source code for:
Board scenarios
whl-ipc-i5 industry, hybrid, hybrid_rt, logical_partiton
whl-ipc-i7 industry, hybrid, hybrid_rt, logical_partiton
ehl-crb-b industry, hybrid, hybrid_rt, logical_partition
nuc7i7dnb industry, hybrid, logical_partition
Tracked-On: #5229
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
2020-09-11 06:24:42 +08:00
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#define P2SB_BASE_GPIO_PORT_ID 0x69U
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#define P2SB_MAX_GPIO_COMMUNITIES 0x6U
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2020-08-24 08:05:46 +08:00
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#endif /* BOARD_INFO_H */
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