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acrn-hypervisor/hypervisor/include/arch/x86/guest/pm.h

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HV: load cpu px data in boot The patch takes Intel ATOM A3960 as example that hard code all Px info which is needed for Px control into Acrn HV and load it in boot process. Signed-off-by: Victor Sun <victor.sun@intel.com> Acked-by: Kevin Tian <kevin.tian@intel.com>
2018-04-04 14:29:46 +08:00
/*
* Copyright (C) 2018 Intel Corporation. All rights reserved.
*
license: Replace license text with SPDX tag Replace the BSD-3-Clause boiler plate license text with an SPDX tag. Fixes: #189 Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-05-26 01:49:13 +08:00
* SPDX-License-Identifier: BSD-3-Clause
HV: load cpu px data in boot The patch takes Intel ATOM A3960 as example that hard code all Px info which is needed for Px control into Acrn HV and load it in boot process. Signed-off-by: Victor Sun <victor.sun@intel.com> Acked-by: Kevin Tian <kevin.tian@intel.com>
2018-04-04 14:29:46 +08:00
*/
HV: code cleanup for cpu state Split pm.c from cpu_state_tbl.c to put guest power management related functions, keep cpu_state_tbl.c to store host cpu state table and related functions. Signed-off-by: Victor Sun <victor.sun@intel.com> Acked-by: Kevin Tian <kevin.tian@intel.com>
2018-04-17 12:12:33 +08:00
#ifndef PM_H
#define PM_H
HV: load cpu px data in boot The patch takes Intel ATOM A3960 as example that hard code all Px info which is needed for Px control into Acrn HV and load it in boot process. Signed-off-by: Victor Sun <victor.sun@intel.com> Acked-by: Kevin Tian <kevin.tian@intel.com>
2018-04-04 14:29:46 +08:00
HV: setup px info when create vm The vm px info would be used for guest Pstate control. Currently it is copied from host boot cpu. Signed-off-by: Victor Sun <victor.sun@intel.com> Acked-by: Kevin Tian <kevin.tian@intel.com>
2018-04-05 19:58:40 +08:00
void vm_setup_cpu_state(struct vm *vm);
HV: load host pm S state data while create vm0 The pm S state data is from host ACPI info and needed for S3/S5 implementation. Signed-off-by: Victor Sun <victor.sun@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-08 09:28:48 +08:00
int vm_load_pm_s_state(struct vm *vm);
HV: trap and validate px request Currently acrn partitions cpus between SOS and UOS, so the default policy is to allow guest managing CPU px state. However we would not blindly passthrough perf_ctrl MSR to guest. Instead guest access is always trapped and validated by acrn hypervisor before forwarding to pcpu. Doing so leaves room for future power budget control in hypervisor, e.g. limiting turbo percentage that a cpu can enter. Signed-off-by: Victor Sun <victor.sun@intel.com> Acked-by: Kevin Tian <kevin.tian@intel.com>
2018-04-05 19:08:38 +08:00
int validate_pstate(struct vm *vm, uint64_t perf_ctl);
HV Cx: add hypercall function to retrieve host cx The patch add function in vhm hypercall to retrieve physical cx data to VHM/DM. Signed-off-by: Victor Sun <victor.sun@intel.com> Acked-by: Kevin Tian <kevin.tian@intel.com>
2018-04-18 01:00:15 +08:00
struct cpu_cx_data* get_target_cx(struct vm *vm, uint8_t cn);
HV: load cpu px data in boot The patch takes Intel ATOM A3960 as example that hard code all Px info which is needed for Px control into Acrn HV and load it in boot process. Signed-off-by: Victor Sun <victor.sun@intel.com> Acked-by: Kevin Tian <kevin.tian@intel.com>
2018-04-04 14:29:46 +08:00
HV: code cleanup for cpu state Split pm.c from cpu_state_tbl.c to put guest power management related functions, keep cpu_state_tbl.c to store host cpu state table and related functions. Signed-off-by: Victor Sun <victor.sun@intel.com> Acked-by: Kevin Tian <kevin.tian@intel.com>
2018-04-17 12:12:33 +08:00
#endif /* PM_H */