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acrn-hypervisor/hypervisor/arch/x86/trusty.c

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add create secure world ept API This patch is prepared for enabling secure world feature. this api will create new eptp for secure world, whose PDPT entries are copied form normal world,the PML4/PDPT for secure world are separated from Normal World, PD/PT are shared in the Secure World's EPT and Normal World's EPT.Secure world can access Normal World's memory, but Normal World can not access Secure World's memory This function implemented： -- Unmap specific memory from guest ept mapping -- Copy PDPT from Normal world to Secure world -- Map specific memory for Secure world -- Unmap specific memory from SOS ept mapping Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-03-01 13:34:41 +08:00
/*
* Copyright (C) 2018 Intel Corporation. All rights reserved.
*
license: Replace license text with SPDX tag Replace the BSD-3-Clause boiler plate license text with an SPDX tag. Fixes: #189 Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-05-26 01:49:13 +08:00
* SPDX-License-Identifier: BSD-3-Clause
add create secure world ept API This patch is prepared for enabling secure world feature. this api will create new eptp for secure world, whose PDPT entries are copied form normal world,the PML4/PDPT for secure world are separated from Normal World, PD/PT are shared in the Secure World's EPT and Normal World's EPT.Secure world can access Normal World's memory, but Normal World can not access Secure World's memory This function implemented： -- Unmap specific memory from guest ept mapping -- Copy PDPT from Normal world to Secure world -- Map specific memory for Secure world -- Unmap specific memory from SOS ept mapping Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-03-01 13:34:41 +08:00
*/
HV: further cleanup of header inclusions According to the comments in hypervisor: " This file includes config header file "bsp_cfg.h" and other hypervisor used header files. It should be included in all the source files." this patch includes all common header files in hypervisor.h then removes other redundant inclusions Signed-off-by: Zide Chen <zide.chen@intel.com>
2018-05-22 08:30:50 +08:00
#include <hypervisor.h>
trusty: add key_info for trusty bring-up For trusty bring-up, key_info is needed. Currently, bootloader did not transfer key_info to hypervisor. So in this patch, use dummy key_info temporarily. Derive vSeed from dSeed before trusty startup, the vSeed will bind with UUID of each VM. Remove key_info from sworld_control structure. Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-03-27 17:28:51 +08:00
#include <hkdf.h>
trusty: Simulate Secure Monitor Call(SMC) by Hypercall For ARM, The SMC instruction is used to generate a synchronous exception that is handled by Secure Monitor code running in EL3. In the ARM architecture, synchronous control is transferred between the normal Non-secure state and the Secure state through Secure Monitor Call exceptions. SMC exceptions are generated by the SMC instruction, and handled by the Secure Monitor.The operation of the Secure Monitor is determined by the parameters that are passed in through registers. For ACRN, Hypervisor will simulate SMC by hypercall to switch vCPU State between Normal World and Secure World. There are 4 registers(RDI, RSI, RDX, RBX) reserved for paramters passing between Normal World and Secure World. Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-03-27 17:26:38 +08:00
trusty: implement hypercall to initialize trusty UOS_Loader will trigger boot of Trusty-OS by HC_INITIALIZE_TRUSTY. UOS_Loader will load trusty image and alloc runtime memory for trusty. UOS_Loader will transfer these information include trusty runtime memory base address, entry address and memory size to hypervisor by trusty_boot_param structure. In hypervisor, once HC_INITIALIZE_TRUSTY received, it will create EPT for Secure World, save Normal World vCPU context, init Secure World vCPU context and switch World state to Secure World. Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-03-27 17:27:51 +08:00
#define TRUSTY_VERSION 1
struct trusty_mem {
/* The first page of trusty memory is reserved for key_info and
* trusty_startup_param.
*/
union {
struct {
struct key_info key_info;
struct trusty_startup_param startup_param;
HV: treewide: give names to unnamed structs/unions According to the syntax defined in C99, each struct/union field must have an identifier. This patch adds names to the previously unnamed fields for C99 compatibility. Here is a summary of the names (marked with a pair of *stars*) added. struct trusty_mem: union { struct { struct key_info key_info; struct trusty_startup_param startup_param; } *data*; uint8_t page[CPU_PAGE_SIZE]; } first_page; struct ptdev_remapping_info: union { struct ptdev_msi_info msi; struct ptdev_intx_info intx; } *ptdev_intr_info*; union code_segment_descriptor: uint64_t value; struct { union { ... } low32; union { ... } high32; } *fields*; similar changes are made to the following structures. * union data_segment_descriptor, * union system_segment_descriptor, * union tss_64_descriptor, and * union idt_64_descriptor struct trace_entry: union { struct { uint32_t a, b, c, d; } *fields_32*; struct { uint8_t a1, a2, a3, a4; uint8_t b1, b2, b3, b4; uint8_t c1, c2, c3, c4; uint8_t d1, d2, d3, d4; } *fields_8*; struct { uint64_t e; uint64_t f; } *fields_64*; char str[16]; } *payload*; Signed-off-by: Junjie Mao <junjie.mao@intel.com> Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-28 23:22:49 +08:00
} data;
trusty: implement hypercall to initialize trusty UOS_Loader will trigger boot of Trusty-OS by HC_INITIALIZE_TRUSTY. UOS_Loader will load trusty image and alloc runtime memory for trusty. UOS_Loader will transfer these information include trusty runtime memory base address, entry address and memory size to hypervisor by trusty_boot_param structure. In hypervisor, once HC_INITIALIZE_TRUSTY received, it will create EPT for Secure World, save Normal World vCPU context, init Secure World vCPU context and switch World state to Secure World. Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-03-27 17:27:51 +08:00
uint8_t page[CPU_PAGE_SIZE];
} first_page;
/* The left memory is for trusty's code/data/heap/stack
*/
uint8_t left_mem[0];
};
trusty: add key_info for trusty bring-up For trusty bring-up, key_info is needed. Currently, bootloader did not transfer key_info to hypervisor. So in this patch, use dummy key_info temporarily. Derive vSeed from dSeed before trusty startup, the vSeed will bind with UUID of each VM. Remove key_info from sworld_control structure. Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-03-27 17:28:51 +08:00
static struct key_info g_key_info = {
.size_of_this_struct = sizeof(g_key_info),
.version = 0,
.platform = 3,
.num_seeds = 1
};
trusty: Simulate Secure Monitor Call(SMC) by Hypercall For ARM, The SMC instruction is used to generate a synchronous exception that is handled by Secure Monitor code running in EL3. In the ARM architecture, synchronous control is transferred between the normal Non-secure state and the Secure state through Secure Monitor Call exceptions. SMC exceptions are generated by the SMC instruction, and handled by the Secure Monitor.The operation of the Secure Monitor is determined by the parameters that are passed in through registers. For ACRN, Hypervisor will simulate SMC by hypercall to switch vCPU State between Normal World and Secure World. There are 4 registers(RDI, RSI, RDX, RBX) reserved for paramters passing between Normal World and Secure World. Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-03-27 17:26:38 +08:00
#define save_segment(seg, SEG_NAME) \
{ \
seg.selector = exec_vmread(VMX_GUEST_##SEG_NAME##_SEL); \
seg.base = exec_vmread(VMX_GUEST_##SEG_NAME##_BASE); \
seg.limit = exec_vmread(VMX_GUEST_##SEG_NAME##_LIMIT); \
seg.attr = exec_vmread(VMX_GUEST_##SEG_NAME##_ATTR); \
}
#define load_segment(seg, SEG_NAME) \
{ \
exec_vmwrite(VMX_GUEST_##SEG_NAME##_SEL, seg.selector); \
exec_vmwrite(VMX_GUEST_##SEG_NAME##_BASE, seg.base); \
exec_vmwrite(VMX_GUEST_##SEG_NAME##_LIMIT, seg.limit); \
exec_vmwrite(VMX_GUEST_##SEG_NAME##_ATTR, seg.attr); \
}
add create secure world ept API This patch is prepared for enabling secure world feature. this api will create new eptp for secure world, whose PDPT entries are copied form normal world,the PML4/PDPT for secure world are separated from Normal World, PD/PT are shared in the Secure World's EPT and Normal World's EPT.Secure world can access Normal World's memory, but Normal World can not access Secure World's memory This function implemented： -- Unmap specific memory from guest ept mapping -- Copy PDPT from Normal world to Secure world -- Map specific memory for Secure world -- Unmap specific memory from SOS ept mapping Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-03-01 13:34:41 +08:00
hv:bugfix for the API of creating secure world Before this patch, HV accesses PML4E of secure world when the PML4 doesn't exist,will access null pointer. Fix as follow: Before the copy of PDPTE,will allocate memory and write PML4E, then copy the PDPTE. Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com> Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com> Reviewed-by: Anthony Xu <anthony.xu@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-03-29 20:14:31 +08:00
static void create_secure_world_ept(struct vm *vm, uint64_t gpa_orig,
uint64_t size, uint64_t gpa_rebased)
add create secure world ept API This patch is prepared for enabling secure world feature. this api will create new eptp for secure world, whose PDPT entries are copied form normal world,the PML4/PDPT for secure world are separated from Normal World, PD/PT are shared in the Secure World's EPT and Normal World's EPT.Secure world can access Normal World's memory, but Normal World can not access Secure World's memory This function implemented： -- Unmap specific memory from guest ept mapping -- Copy PDPT from Normal world to Secure world -- Map specific memory for Secure world -- Unmap specific memory from SOS ept mapping Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-03-01 13:34:41 +08:00
{
hv:bugfix for the API of creating secure world Before this patch, HV accesses PML4E of secure world when the PML4 doesn't exist,will access null pointer. Fix as follow: Before the copy of PDPTE,will allocate memory and write PML4E, then copy the PDPTE. Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com> Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com> Reviewed-by: Anthony Xu <anthony.xu@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-03-29 20:14:31 +08:00
uint64_t nworld_pml4e = 0;
uint64_t sworld_pml4e = 0;
add create secure world ept API This patch is prepared for enabling secure world feature. this api will create new eptp for secure world, whose PDPT entries are copied form normal world,the PML4/PDPT for secure world are separated from Normal World, PD/PT are shared in the Secure World's EPT and Normal World's EPT.Secure world can access Normal World's memory, but Normal World can not access Secure World's memory This function implemented： -- Unmap specific memory from guest ept mapping -- Copy PDPT from Normal world to Secure world -- Map specific memory for Secure world -- Unmap specific memory from SOS ept mapping Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-03-01 13:34:41 +08:00
struct map_params map_params;
hv:bugfix for the API of creating secure world Before this patch, HV accesses PML4E of secure world when the PML4 doesn't exist,will access null pointer. Fix as follow: Before the copy of PDPTE,will allocate memory and write PML4E, then copy the PDPTE. Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com> Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com> Reviewed-by: Anthony Xu <anthony.xu@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-03-29 20:14:31 +08:00
uint64_t gpa = 0;
uint64_t hpa = gpa2hpa(vm, gpa_orig);
uint64_t table_present = (IA32E_EPT_R_BIT |
IA32E_EPT_W_BIT |
IA32E_EPT_X_BIT);
ept: change eptp to PA eptp should be record as PA. this patch changed nworld_eptp, sworld_eptp and m2p eptp to PA type, necessary HPA2HVA/HVA2HPA transition is used for them after the change. Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-04-03 22:25:40 +08:00
void *sub_table_addr = NULL, *pml4_base = NULL;
add create secure world ept API This patch is prepared for enabling secure world feature. this api will create new eptp for secure world, whose PDPT entries are copied form normal world,the PML4/PDPT for secure world are separated from Normal World, PD/PT are shared in the Secure World's EPT and Normal World's EPT.Secure world can access Normal World's memory, but Normal World can not access Secure World's memory This function implemented： -- Unmap specific memory from guest ept mapping -- Copy PDPT from Normal world to Secure world -- Map specific memory for Secure world -- Unmap specific memory from SOS ept mapping Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-03-01 13:34:41 +08:00
struct vm *vm0 = get_vm_from_vmid(0);
trusty: invept should go through all vcpus make invept request for all vcpus in vms. Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-05-22 15:28:48 +08:00
int i;
struct vcpu *vcpu;
add create secure world ept API This patch is prepared for enabling secure world feature. this api will create new eptp for secure world, whose PDPT entries are copied form normal world,the PML4/PDPT for secure world are separated from Normal World, PD/PT are shared in the Secure World's EPT and Normal World's EPT.Secure world can access Normal World's memory, but Normal World can not access Secure World's memory This function implemented： -- Unmap specific memory from guest ept mapping -- Copy PDPT from Normal world to Secure world -- Map specific memory for Secure world -- Unmap specific memory from SOS ept mapping Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-03-01 13:34:41 +08:00
security: fix issues reported by Klocwork - NULL pointer reference risk - buffer overflow risk Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-05-03 19:28:17 +08:00
if (vm0 == NULL) {
pr_err("Parse vm0 context failed.");
return;
}
hv:bugfix for the API of creating secure world Before this patch, HV accesses PML4E of secure world when the PML4 doesn't exist,will access null pointer. Fix as follow: Before the copy of PDPTE,will allocate memory and write PML4E, then copy the PDPTE. Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com> Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com> Reviewed-by: Anthony Xu <anthony.xu@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-03-29 20:14:31 +08:00
if (!vm->sworld_control.sworld_enabled
ept: change eptp to PA eptp should be record as PA. this patch changed nworld_eptp, sworld_eptp and m2p eptp to PA type, necessary HPA2HVA/HVA2HPA transition is used for them after the change. Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-04-03 22:25:40 +08:00
|| vm->arch_vm.sworld_eptp != 0) {
hv:bugfix for the API of creating secure world Before this patch, HV accesses PML4E of secure world when the PML4 doesn't exist,will access null pointer. Fix as follow: Before the copy of PDPTE,will allocate memory and write PML4E, then copy the PDPTE. Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com> Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com> Reviewed-by: Anthony Xu <anthony.xu@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-03-29 20:14:31 +08:00
pr_err("Sworld is not enabled or Sworld eptp is not NULL");
return;
}
add create secure world ept API This patch is prepared for enabling secure world feature. this api will create new eptp for secure world, whose PDPT entries are copied form normal world,the PML4/PDPT for secure world are separated from Normal World, PD/PT are shared in the Secure World's EPT and Normal World's EPT.Secure world can access Normal World's memory, but Normal World can not access Secure World's memory This function implemented： -- Unmap specific memory from guest ept mapping -- Copy PDPT from Normal world to Secure world -- Map specific memory for Secure world -- Unmap specific memory from SOS ept mapping Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-03-01 13:34:41 +08:00
hv:check continuous hpa when create secure world Add check_continuous_hpa API: when create secure world,if the physical address is not continuous, will assert. Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-04-04 14:29:08 +08:00
/* Check the physical address should be continuous */
if (!check_continuous_hpa(vm, gpa_orig, size)) {
ASSERT(false, "The physical addr is not continuous for Trusty");
return;
}
mmu: Rename several variables related to page table type rename 'PT_HOST' to 'PTT_HOST' rename 'PT_EPT' to 'PTT_EPT' rename 'ept_type' to 'table_type' Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-03-20 11:27:20 +08:00
map_params.page_table_type = PTT_EPT;
ept: change eptp to PA eptp should be record as PA. this patch changed nworld_eptp, sworld_eptp and m2p eptp to PA type, necessary HPA2HVA/HVA2HPA transition is used for them after the change. Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-04-03 22:25:40 +08:00
map_params.pml4_inverted = HPA2HVA(vm->arch_vm.m2p);
add create secure world ept API This patch is prepared for enabling secure world feature. this api will create new eptp for secure world, whose PDPT entries are copied form normal world,the PML4/PDPT for secure world are separated from Normal World, PD/PT are shared in the Secure World's EPT and Normal World's EPT.Secure world can access Normal World's memory, but Normal World can not access Secure World's memory This function implemented： -- Unmap specific memory from guest ept mapping -- Copy PDPT from Normal world to Secure world -- Map specific memory for Secure world -- Unmap specific memory from SOS ept mapping Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-03-01 13:34:41 +08:00
hv:bugfix for the API of creating secure world Before this patch, HV accesses PML4E of secure world when the PML4 doesn't exist,will access null pointer. Fix as follow: Before the copy of PDPTE,will allocate memory and write PML4E, then copy the PDPTE. Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com> Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com> Reviewed-by: Anthony Xu <anthony.xu@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-03-29 20:14:31 +08:00
/* Unmap gpa_orig~gpa_orig+size from guest normal world ept mapping */
ept: change eptp to PA eptp should be record as PA. this patch changed nworld_eptp, sworld_eptp and m2p eptp to PA type, necessary HPA2HVA/HVA2HPA transition is used for them after the change. Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-04-03 22:25:40 +08:00
map_params.pml4_base = HPA2HVA(vm->arch_vm.nworld_eptp);
hv:bugfix for the API of creating secure world Before this patch, HV accesses PML4E of secure world when the PML4 doesn't exist,will access null pointer. Fix as follow: Before the copy of PDPTE,will allocate memory and write PML4E, then copy the PDPTE. Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com> Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com> Reviewed-by: Anthony Xu <anthony.xu@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-03-29 20:14:31 +08:00
unmap_mem(&map_params, (void *)hpa, (void *)gpa_orig, size, 0);
add create secure world ept API This patch is prepared for enabling secure world feature. this api will create new eptp for secure world, whose PDPT entries are copied form normal world,the PML4/PDPT for secure world are separated from Normal World, PD/PT are shared in the Secure World's EPT and Normal World's EPT.Secure world can access Normal World's memory, but Normal World can not access Secure World's memory This function implemented： -- Unmap specific memory from guest ept mapping -- Copy PDPT from Normal world to Secure world -- Map specific memory for Secure world -- Unmap specific memory from SOS ept mapping Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-03-01 13:34:41 +08:00
/* Copy PDPT entries from Normal world to Secure world
* Secure world can access Normal World's memory,
* but Normal World can not access Secure World's memory.
hv:bugfix for the API of creating secure world Before this patch, HV accesses PML4E of secure world when the PML4 doesn't exist,will access null pointer. Fix as follow: Before the copy of PDPTE,will allocate memory and write PML4E, then copy the PDPTE. Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com> Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com> Reviewed-by: Anthony Xu <anthony.xu@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-03-29 20:14:31 +08:00
* The PML4/PDPT for Secure world are separated from
* Normal World.PD/PT are shared in both Secure world's EPT
* and Normal World's EPT
add create secure world ept API This patch is prepared for enabling secure world feature. this api will create new eptp for secure world, whose PDPT entries are copied form normal world,the PML4/PDPT for secure world are separated from Normal World, PD/PT are shared in the Secure World's EPT and Normal World's EPT.Secure world can access Normal World's memory, but Normal World can not access Secure World's memory This function implemented： -- Unmap specific memory from guest ept mapping -- Copy PDPT from Normal world to Secure world -- Map specific memory for Secure world -- Unmap specific memory from SOS ept mapping Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-03-01 13:34:41 +08:00
*/
ept: change eptp to PA eptp should be record as PA. this patch changed nworld_eptp, sworld_eptp and m2p eptp to PA type, necessary HPA2HVA/HVA2HPA transition is used for them after the change. Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-04-03 22:25:40 +08:00
pml4_base = alloc_paging_struct();
vm->arch_vm.sworld_eptp = HVA2HPA(pml4_base);
hv:bugfix for the API of creating secure world Before this patch, HV accesses PML4E of secure world when the PML4 doesn't exist,will access null pointer. Fix as follow: Before the copy of PDPTE,will allocate memory and write PML4E, then copy the PDPTE. Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com> Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com> Reviewed-by: Anthony Xu <anthony.xu@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-03-29 20:14:31 +08:00
/* The trusty memory is remapped to guest physical address
* of gpa_rebased to gpa_rebased + size
*/
sub_table_addr = alloc_paging_struct();
ept: change eptp to PA eptp should be record as PA. this patch changed nworld_eptp, sworld_eptp and m2p eptp to PA type, necessary HPA2HVA/HVA2HPA transition is used for them after the change. Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-04-03 22:25:40 +08:00
sworld_pml4e = HVA2HPA(sub_table_addr) | table_present;
MEM_WRITE64(pml4_base, sworld_pml4e);
hv:bugfix for the API of creating secure world Before this patch, HV accesses PML4E of secure world when the PML4 doesn't exist,will access null pointer. Fix as follow: Before the copy of PDPTE,will allocate memory and write PML4E, then copy the PDPTE. Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com> Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com> Reviewed-by: Anthony Xu <anthony.xu@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-03-29 20:14:31 +08:00
ept: change eptp to PA eptp should be record as PA. this patch changed nworld_eptp, sworld_eptp and m2p eptp to PA type, necessary HPA2HVA/HVA2HPA transition is used for them after the change. Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-04-03 22:25:40 +08:00
nworld_pml4e = MEM_READ64(HPA2HVA(vm->arch_vm.nworld_eptp));
hv:bugfix for the API of creating secure world Before this patch, HV accesses PML4E of secure world when the PML4 doesn't exist,will access null pointer. Fix as follow: Before the copy of PDPTE,will allocate memory and write PML4E, then copy the PDPTE. Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com> Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com> Reviewed-by: Anthony Xu <anthony.xu@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-03-29 20:14:31 +08:00
memcpy_s(HPA2HVA(sworld_pml4e & IA32E_REF_MASK), CPU_PAGE_SIZE,
HPA2HVA(nworld_pml4e & IA32E_REF_MASK), CPU_PAGE_SIZE);
add create secure world ept API This patch is prepared for enabling secure world feature. this api will create new eptp for secure world, whose PDPT entries are copied form normal world,the PML4/PDPT for secure world are separated from Normal World, PD/PT are shared in the Secure World's EPT and Normal World's EPT.Secure world can access Normal World's memory, but Normal World can not access Secure World's memory This function implemented： -- Unmap specific memory from guest ept mapping -- Copy PDPT from Normal world to Secure world -- Map specific memory for Secure world -- Unmap specific memory from SOS ept mapping Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-03-01 13:34:41 +08:00
hv:bugfix for the API of creating secure world Before this patch, HV accesses PML4E of secure world when the PML4 doesn't exist,will access null pointer. Fix as follow: Before the copy of PDPTE,will allocate memory and write PML4E, then copy the PDPTE. Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com> Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com> Reviewed-by: Anthony Xu <anthony.xu@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-03-29 20:14:31 +08:00
/* Map gpa_rebased~gpa_rebased+size
add create secure world ept API This patch is prepared for enabling secure world feature. this api will create new eptp for secure world, whose PDPT entries are copied form normal world,the PML4/PDPT for secure world are separated from Normal World, PD/PT are shared in the Secure World's EPT and Normal World's EPT.Secure world can access Normal World's memory, but Normal World can not access Secure World's memory This function implemented： -- Unmap specific memory from guest ept mapping -- Copy PDPT from Normal world to Secure world -- Map specific memory for Secure world -- Unmap specific memory from SOS ept mapping Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-03-01 13:34:41 +08:00
* to secure ept mapping
*/
ept: change eptp to PA eptp should be record as PA. this patch changed nworld_eptp, sworld_eptp and m2p eptp to PA type, necessary HPA2HVA/HVA2HPA transition is used for them after the change. Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-04-03 22:25:40 +08:00
map_params.pml4_base = pml4_base;
add create secure world ept API This patch is prepared for enabling secure world feature. this api will create new eptp for secure world, whose PDPT entries are copied form normal world,the PML4/PDPT for secure world are separated from Normal World, PD/PT are shared in the Secure World's EPT and Normal World's EPT.Secure world can access Normal World's memory, but Normal World can not access Secure World's memory This function implemented： -- Unmap specific memory from guest ept mapping -- Copy PDPT from Normal world to Secure world -- Map specific memory for Secure world -- Unmap specific memory from SOS ept mapping Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-03-01 13:34:41 +08:00
map_mem(&map_params, (void *)hpa,
hv:bugfix for the API of creating secure world Before this patch, HV accesses PML4E of secure world when the PML4 doesn't exist,will access null pointer. Fix as follow: Before the copy of PDPTE,will allocate memory and write PML4E, then copy the PDPTE. Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com> Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com> Reviewed-by: Anthony Xu <anthony.xu@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-03-29 20:14:31 +08:00
(void *)gpa_rebased, size,
hv: remove config_page_table_attr Before we set the page table, we should know the attribute. So move configure the page table attribute outside of modify_paging. Signed-off-by: Li, Fei1 <fei1.li@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-21 10:08:38 +08:00
(IA32E_EPT_R_BIT |
IA32E_EPT_W_BIT |
IA32E_EPT_X_BIT |
IA32E_EPT_WB));
add create secure world ept API This patch is prepared for enabling secure world feature. this api will create new eptp for secure world, whose PDPT entries are copied form normal world,the PML4/PDPT for secure world are separated from Normal World, PD/PT are shared in the Secure World's EPT and Normal World's EPT.Secure world can access Normal World's memory, but Normal World can not access Secure World's memory This function implemented： -- Unmap specific memory from guest ept mapping -- Copy PDPT from Normal world to Secure world -- Map specific memory for Secure world -- Unmap specific memory from SOS ept mapping Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-03-01 13:34:41 +08:00
hv:bugfix for the API of creating secure world Before this patch, HV accesses PML4E of secure world when the PML4 doesn't exist,will access null pointer. Fix as follow: Before the copy of PDPTE,will allocate memory and write PML4E, then copy the PDPTE. Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com> Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com> Reviewed-by: Anthony Xu <anthony.xu@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-03-29 20:14:31 +08:00
/* Unmap trusty memory space from sos ept mapping*/
ept: change eptp to PA eptp should be record as PA. this patch changed nworld_eptp, sworld_eptp and m2p eptp to PA type, necessary HPA2HVA/HVA2HPA transition is used for them after the change. Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-04-03 22:25:40 +08:00
map_params.pml4_base = HPA2HVA(vm0->arch_vm.nworld_eptp);
map_params.pml4_inverted = HPA2HVA(vm0->arch_vm.m2p);
add create secure world ept API This patch is prepared for enabling secure world feature. this api will create new eptp for secure world, whose PDPT entries are copied form normal world,the PML4/PDPT for secure world are separated from Normal World, PD/PT are shared in the Secure World's EPT and Normal World's EPT.Secure world can access Normal World's memory, but Normal World can not access Secure World's memory This function implemented： -- Unmap specific memory from guest ept mapping -- Copy PDPT from Normal world to Secure world -- Map specific memory for Secure world -- Unmap specific memory from SOS ept mapping Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-03-01 13:34:41 +08:00
/* Get the gpa address in SOS */
gpa = hpa2gpa(vm0, hpa);
unmap_mem(&map_params, (void *)hpa, (void *)gpa, size, 0);
/* Backup secure world info, will be used when
* destroy secure world */
hv: Save secure world memory info into vm instead of vm0 A bugfix for saving secure world memory info. Maybe there are multiple UOS, each VM has its own secure world and normal world, should save memory info into individual VM. Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-03-27 11:56:56 +08:00
vm->sworld_control.sworld_memory.base_gpa = gpa;
vm->sworld_control.sworld_memory.base_hpa = hpa;
vm->sworld_control.sworld_memory.length = size;
add create secure world ept API This patch is prepared for enabling secure world feature. this api will create new eptp for secure world, whose PDPT entries are copied form normal world,the PML4/PDPT for secure world are separated from Normal World, PD/PT are shared in the Secure World's EPT and Normal World's EPT.Secure world can access Normal World's memory, but Normal World can not access Secure World's memory This function implemented： -- Unmap specific memory from guest ept mapping -- Copy PDPT from Normal world to Secure world -- Map specific memory for Secure world -- Unmap specific memory from SOS ept mapping Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-03-01 13:34:41 +08:00
trusty: invept should go through all vcpus make invept request for all vcpus in vms. Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-05-22 15:28:48 +08:00
foreach_vcpu(i, vm, vcpu) {
vcpu_make_request(vcpu, ACRN_REQUEST_EPT_FLUSH);
}
add create secure world ept API This patch is prepared for enabling secure world feature. this api will create new eptp for secure world, whose PDPT entries are copied form normal world,the PML4/PDPT for secure world are separated from Normal World, PD/PT are shared in the Secure World's EPT and Normal World's EPT.Secure world can access Normal World's memory, but Normal World can not access Secure World's memory This function implemented： -- Unmap specific memory from guest ept mapping -- Copy PDPT from Normal world to Secure world -- Map specific memory for Secure world -- Unmap specific memory from SOS ept mapping Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-03-01 13:34:41 +08:00
trusty: invept should go through all vcpus make invept request for all vcpus in vms. Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-05-22 15:28:48 +08:00
foreach_vcpu(i, vm0, vcpu) {
vcpu_make_request(vcpu, ACRN_REQUEST_EPT_FLUSH);
}
add create secure world ept API This patch is prepared for enabling secure world feature. this api will create new eptp for secure world, whose PDPT entries are copied form normal world,the PML4/PDPT for secure world are separated from Normal World, PD/PT are shared in the Secure World's EPT and Normal World's EPT.Secure world can access Normal World's memory, but Normal World can not access Secure World's memory This function implemented： -- Unmap specific memory from guest ept mapping -- Copy PDPT from Normal world to Secure world -- Map specific memory for Secure world -- Unmap specific memory from SOS ept mapping Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-03-01 13:34:41 +08:00
}
hv:add destroy Secure world API This patch added API destroy_secure_world, which will do: -- clear trusty memory space -- restore memory to SOS ept mapping It will be called when VM is destroyed, furthermore, ept of Secure world will be destroyed as well. Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com> Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com> Reviewed-by: Anthony Xu <anthony.xu@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-04-03 09:52:52 +08:00
void destroy_secure_world(struct vm *vm)
{
struct map_params map_params;
struct vm *vm0 = get_vm_from_vmid(0);
security: fix issues reported by Klocwork - NULL pointer reference risk - buffer overflow risk Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-05-03 19:28:17 +08:00
if (vm0 == NULL) {
pr_err("Parse vm0 context failed.");
return;
}
hv:add destroy Secure world API This patch added API destroy_secure_world, which will do: -- clear trusty memory space -- restore memory to SOS ept mapping It will be called when VM is destroyed, furthermore, ept of Secure world will be destroyed as well. Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com> Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com> Reviewed-by: Anthony Xu <anthony.xu@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-04-03 09:52:52 +08:00
/* clear trusty memory space */
memset(HPA2HVA(vm->sworld_control.sworld_memory.base_hpa),
0, vm->sworld_control.sworld_memory.length);
/* restore memory to SOS ept mapping */
map_params.page_table_type = PTT_EPT;
ept: change eptp to PA eptp should be record as PA. this patch changed nworld_eptp, sworld_eptp and m2p eptp to PA type, necessary HPA2HVA/HVA2HPA transition is used for them after the change. Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-04-03 22:25:40 +08:00
map_params.pml4_base = HPA2HVA(vm0->arch_vm.nworld_eptp);
map_params.pml4_inverted = HPA2HVA(vm0->arch_vm.m2p);
hv:add destroy Secure world API This patch added API destroy_secure_world, which will do: -- clear trusty memory space -- restore memory to SOS ept mapping It will be called when VM is destroyed, furthermore, ept of Secure world will be destroyed as well. Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com> Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com> Reviewed-by: Anthony Xu <anthony.xu@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-04-03 09:52:52 +08:00
map_mem(&map_params, (void *)vm->sworld_control.sworld_memory.base_hpa,
(void *)vm->sworld_control.sworld_memory.base_gpa,
vm->sworld_control.sworld_memory.length,
hv: remove config_page_table_attr Before we set the page table, we should know the attribute. So move configure the page table attribute outside of modify_paging. Signed-off-by: Li, Fei1 <fei1.li@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-21 10:08:38 +08:00
(IA32E_EPT_R_BIT |
IA32E_EPT_W_BIT |
IA32E_EPT_X_BIT |
IA32E_EPT_WB));
hv:add destroy Secure world API This patch added API destroy_secure_world, which will do: -- clear trusty memory space -- restore memory to SOS ept mapping It will be called when VM is destroyed, furthermore, ept of Secure world will be destroyed as well. Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com> Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com> Reviewed-by: Anthony Xu <anthony.xu@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-04-03 09:52:52 +08:00
}
trusty: Simulate Secure Monitor Call(SMC) by Hypercall For ARM, The SMC instruction is used to generate a synchronous exception that is handled by Secure Monitor code running in EL3. In the ARM architecture, synchronous control is transferred between the normal Non-secure state and the Secure state through Secure Monitor Call exceptions. SMC exceptions are generated by the SMC instruction, and handled by the Secure Monitor.The operation of the Secure Monitor is determined by the parameters that are passed in through registers. For ACRN, Hypervisor will simulate SMC by hypercall to switch vCPU State between Normal World and Secure World. There are 4 registers(RDI, RSI, RDX, RBX) reserved for paramters passing between Normal World and Secure World. Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-03-27 17:26:38 +08:00
static void save_world_ctx(struct run_context *context)
{
/* VMCS GUEST field */
hv: cache tsc_offset Guest write tsc: cache the offset into run_context.tsc_offset; Guest read tsc : use run_context.tsc_offset to calculate guest_tsc. Signed-off-by: Qi Yadong <yadong.qi@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-04-09 10:56:25 +08:00
/* TSC_OFFSET, CR3, RIP, RSP, RFLAGS already saved on VMEXIT */
trusty: init & switch world fix - when init, cr0 & cr4 should read from VMCS - when world switch, cr0/cr4 read shadow should also be save/restore v2: - use context->vmx_cr0/cr4 to save/restore VMX_GUEST_CR0/CR4 - use context->cr0/cr4 to save/restore VMX_CR0/CR4_READ_SHADOW Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com> Acked-by: Anthony Xu <anthony.xu@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-16 14:46:51 +08:00
context->cr0 = exec_vmread(VMX_CR0_READ_SHADOW);
context->cr4 = exec_vmread(VMX_CR4_READ_SHADOW);
context->vmx_cr0 = exec_vmread(VMX_GUEST_CR0);
context->vmx_cr4 = exec_vmread(VMX_GUEST_CR4);
trusty: Simulate Secure Monitor Call(SMC) by Hypercall For ARM, The SMC instruction is used to generate a synchronous exception that is handled by Secure Monitor code running in EL3. In the ARM architecture, synchronous control is transferred between the normal Non-secure state and the Secure state through Secure Monitor Call exceptions. SMC exceptions are generated by the SMC instruction, and handled by the Secure Monitor.The operation of the Secure Monitor is determined by the parameters that are passed in through registers. For ACRN, Hypervisor will simulate SMC by hypercall to switch vCPU State between Normal World and Secure World. There are 4 registers(RDI, RSI, RDX, RBX) reserved for paramters passing between Normal World and Secure World. Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-03-27 17:26:38 +08:00
context->dr7 = exec_vmread(VMX_GUEST_DR7);
context->ia32_debugctl = exec_vmread64(VMX_GUEST_IA32_DEBUGCTL_FULL);
hv: add context->vmx_ia32_pat to save and restore VMCS Similar to cr0/4: - use context->vmx_ia32_pat to save/restore VMX_GUEST_IA32_PAT field - use context->ia32_pat to keep track the guest' view of IA32_PAT MSR Signed-off-by: Zide Chen <zide.chen@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-22 07:51:21 +08:00
/*
* Similar to CR0 and CR4, the actual value of guest's IA32_PAT MSR
* (represented by context->vmx_ia32_pat) could be different from the
* value that guest reads (represented by context->ia32_pat).
*
* the wrmsr handler keeps track of 'ia32_pat', and we only
* need to load 'vmx_ia32_pat' here.
*/
context->vmx_ia32_pat = exec_vmread(VMX_GUEST_IA32_PAT_FULL);
trusty: Simulate Secure Monitor Call(SMC) by Hypercall For ARM, The SMC instruction is used to generate a synchronous exception that is handled by Secure Monitor code running in EL3. In the ARM architecture, synchronous control is transferred between the normal Non-secure state and the Secure state through Secure Monitor Call exceptions. SMC exceptions are generated by the SMC instruction, and handled by the Secure Monitor.The operation of the Secure Monitor is determined by the parameters that are passed in through registers. For ACRN, Hypervisor will simulate SMC by hypercall to switch vCPU State between Normal World and Secure World. There are 4 registers(RDI, RSI, RDX, RBX) reserved for paramters passing between Normal World and Secure World. Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-03-27 17:26:38 +08:00
context->ia32_efer = exec_vmread64(VMX_GUEST_IA32_EFER_FULL);
context->ia32_sysenter_cs = exec_vmread(VMX_GUEST_IA32_SYSENTER_CS);
context->ia32_sysenter_esp = exec_vmread(VMX_GUEST_IA32_SYSENTER_ESP);
context->ia32_sysenter_eip = exec_vmread(VMX_GUEST_IA32_SYSENTER_EIP);
save_segment(context->cs, CS);
save_segment(context->ss, SS);
save_segment(context->ds, DS);
save_segment(context->es, ES);
save_segment(context->fs, FS);
save_segment(context->gs, GS);
save_segment(context->tr, TR);
save_segment(context->ldtr, LDTR);
/* Only base and limit for IDTR and GDTR */
context->idtr.base = exec_vmread(VMX_GUEST_IDTR_BASE);
context->idtr.limit = exec_vmread(VMX_GUEST_IDTR_LIMIT);
context->gdtr.base = exec_vmread(VMX_GUEST_GDTR_BASE);
context->gdtr.limit = exec_vmread(VMX_GUEST_GDTR_LIMIT);
/* MSRs which not in the VMCS */
context->ia32_star = msr_read(MSR_IA32_STAR);
context->ia32_lstar = msr_read(MSR_IA32_LSTAR);
context->ia32_fmask = msr_read(MSR_IA32_FMASK);
context->ia32_kernel_gs_base = msr_read(MSR_IA32_KERNEL_GS_BASE);
/* FX area */
asm volatile("fxsave (%0)"
: : "r" (context->fxstore_guest_area) : "memory");
}
static void load_world_ctx(struct run_context *context)
{
/* VMCS Execution field */
exec_vmwrite64(VMX_TSC_OFFSET_FULL, context->tsc_offset);
/* VMCS GUEST field */
trusty: init & switch world fix - when init, cr0 & cr4 should read from VMCS - when world switch, cr0/cr4 read shadow should also be save/restore v2: - use context->vmx_cr0/cr4 to save/restore VMX_GUEST_CR0/CR4 - use context->cr0/cr4 to save/restore VMX_CR0/CR4_READ_SHADOW Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com> Acked-by: Anthony Xu <anthony.xu@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-16 14:46:51 +08:00
exec_vmwrite(VMX_CR0_READ_SHADOW, context->cr0);
trusty: Simulate Secure Monitor Call(SMC) by Hypercall For ARM, The SMC instruction is used to generate a synchronous exception that is handled by Secure Monitor code running in EL3. In the ARM architecture, synchronous control is transferred between the normal Non-secure state and the Secure state through Secure Monitor Call exceptions. SMC exceptions are generated by the SMC instruction, and handled by the Secure Monitor.The operation of the Secure Monitor is determined by the parameters that are passed in through registers. For ACRN, Hypervisor will simulate SMC by hypercall to switch vCPU State between Normal World and Secure World. There are 4 registers(RDI, RSI, RDX, RBX) reserved for paramters passing between Normal World and Secure World. Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-03-27 17:26:38 +08:00
exec_vmwrite(VMX_GUEST_CR3, context->cr3);
trusty: init & switch world fix - when init, cr0 & cr4 should read from VMCS - when world switch, cr0/cr4 read shadow should also be save/restore v2: - use context->vmx_cr0/cr4 to save/restore VMX_GUEST_CR0/CR4 - use context->cr0/cr4 to save/restore VMX_CR0/CR4_READ_SHADOW Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com> Acked-by: Anthony Xu <anthony.xu@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-16 14:46:51 +08:00
exec_vmwrite(VMX_CR4_READ_SHADOW, context->cr4);
exec_vmwrite(VMX_GUEST_CR0, context->vmx_cr0);
exec_vmwrite(VMX_GUEST_CR4, context->vmx_cr4);
trusty: Simulate Secure Monitor Call(SMC) by Hypercall For ARM, The SMC instruction is used to generate a synchronous exception that is handled by Secure Monitor code running in EL3. In the ARM architecture, synchronous control is transferred between the normal Non-secure state and the Secure state through Secure Monitor Call exceptions. SMC exceptions are generated by the SMC instruction, and handled by the Secure Monitor.The operation of the Secure Monitor is determined by the parameters that are passed in through registers. For ACRN, Hypervisor will simulate SMC by hypercall to switch vCPU State between Normal World and Secure World. There are 4 registers(RDI, RSI, RDX, RBX) reserved for paramters passing between Normal World and Secure World. Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-03-27 17:26:38 +08:00
exec_vmwrite(VMX_GUEST_RIP, context->rip);
exec_vmwrite(VMX_GUEST_RSP, context->rsp);
exec_vmwrite(VMX_GUEST_RFLAGS, context->rflags);
exec_vmwrite(VMX_GUEST_DR7, context->dr7);
exec_vmwrite64(VMX_GUEST_IA32_DEBUGCTL_FULL, context->ia32_debugctl);
hv: add context->vmx_ia32_pat to save and restore VMCS Similar to cr0/4: - use context->vmx_ia32_pat to save/restore VMX_GUEST_IA32_PAT field - use context->ia32_pat to keep track the guest' view of IA32_PAT MSR Signed-off-by: Zide Chen <zide.chen@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-22 07:51:21 +08:00
exec_vmwrite64(VMX_GUEST_IA32_PAT_FULL, context->vmx_ia32_pat);
trusty: Simulate Secure Monitor Call(SMC) by Hypercall For ARM, The SMC instruction is used to generate a synchronous exception that is handled by Secure Monitor code running in EL3. In the ARM architecture, synchronous control is transferred between the normal Non-secure state and the Secure state through Secure Monitor Call exceptions. SMC exceptions are generated by the SMC instruction, and handled by the Secure Monitor.The operation of the Secure Monitor is determined by the parameters that are passed in through registers. For ACRN, Hypervisor will simulate SMC by hypercall to switch vCPU State between Normal World and Secure World. There are 4 registers(RDI, RSI, RDX, RBX) reserved for paramters passing between Normal World and Secure World. Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-03-27 17:26:38 +08:00
exec_vmwrite64(VMX_GUEST_IA32_EFER_FULL, context->ia32_efer);
exec_vmwrite(VMX_GUEST_IA32_SYSENTER_CS, context->ia32_sysenter_cs);
exec_vmwrite(VMX_GUEST_IA32_SYSENTER_ESP, context->ia32_sysenter_esp);
exec_vmwrite(VMX_GUEST_IA32_SYSENTER_EIP, context->ia32_sysenter_eip);
load_segment(context->cs, CS);
load_segment(context->ss, SS);
load_segment(context->ds, DS);
load_segment(context->es, ES);
load_segment(context->fs, FS);
load_segment(context->gs, GS);
load_segment(context->tr, TR);
load_segment(context->ldtr, LDTR);
/* Only base and limit for IDTR and GDTR */
exec_vmwrite(VMX_GUEST_IDTR_BASE, context->idtr.base);
exec_vmwrite(VMX_GUEST_IDTR_LIMIT, context->idtr.limit);
exec_vmwrite(VMX_GUEST_GDTR_BASE, context->gdtr.base);
exec_vmwrite(VMX_GUEST_GDTR_LIMIT, context->gdtr.limit);
/* MSRs which not in the VMCS */
msr_write(MSR_IA32_STAR, context->ia32_star);
msr_write(MSR_IA32_LSTAR, context->ia32_lstar);
msr_write(MSR_IA32_FMASK, context->ia32_fmask);
msr_write(MSR_IA32_KERNEL_GS_BASE, context->ia32_kernel_gs_base);
/* FX area */
asm volatile("fxrstor (%0)" : : "r" (context->fxstore_guest_area));
}
static void copy_smc_param(struct run_context *prev_ctx,
struct run_context *next_ctx)
{
next_ctx->guest_cpu_regs.regs.rdi = prev_ctx->guest_cpu_regs.regs.rdi;
next_ctx->guest_cpu_regs.regs.rsi = prev_ctx->guest_cpu_regs.regs.rsi;
next_ctx->guest_cpu_regs.regs.rdx = prev_ctx->guest_cpu_regs.regs.rdx;
next_ctx->guest_cpu_regs.regs.rbx = prev_ctx->guest_cpu_regs.regs.rbx;
}
void switch_world(struct vcpu *vcpu, int next_world)
{
struct vcpu_arch *arch_vcpu = &vcpu->arch_vcpu;
/* save previous world context */
save_world_ctx(&arch_vcpu->contexts[!next_world]);
/* load next world context */
load_world_ctx(&arch_vcpu->contexts[next_world]);
/* Copy SMC parameters: RDI, RSI, RDX, RBX */
copy_smc_param(&arch_vcpu->contexts[!next_world],
&arch_vcpu->contexts[next_world]);
/* load EPTP for next world */
if (next_world == NORMAL_WORLD) {
exec_vmwrite64(VMX_EPT_POINTER_FULL,
HV: treewide: convert hexadecimals used in bitops to unsigned Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2018-06-19 18:33:58 +08:00
vcpu->vm->arch_vm.nworld_eptp | (3UL<<3) | 6UL);
trusty: Simulate Secure Monitor Call(SMC) by Hypercall For ARM, The SMC instruction is used to generate a synchronous exception that is handled by Secure Monitor code running in EL3. In the ARM architecture, synchronous control is transferred between the normal Non-secure state and the Secure state through Secure Monitor Call exceptions. SMC exceptions are generated by the SMC instruction, and handled by the Secure Monitor.The operation of the Secure Monitor is determined by the parameters that are passed in through registers. For ACRN, Hypervisor will simulate SMC by hypercall to switch vCPU State between Normal World and Secure World. There are 4 registers(RDI, RSI, RDX, RBX) reserved for paramters passing between Normal World and Secure World. Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-03-27 17:26:38 +08:00
} else {
exec_vmwrite64(VMX_EPT_POINTER_FULL,
HV: treewide: convert hexadecimals used in bitops to unsigned Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2018-06-19 18:33:58 +08:00
vcpu->vm->arch_vm.sworld_eptp | (3UL<<3) | 6UL);
trusty: Simulate Secure Monitor Call(SMC) by Hypercall For ARM, The SMC instruction is used to generate a synchronous exception that is handled by Secure Monitor code running in EL3. In the ARM architecture, synchronous control is transferred between the normal Non-secure state and the Secure state through Secure Monitor Call exceptions. SMC exceptions are generated by the SMC instruction, and handled by the Secure Monitor.The operation of the Secure Monitor is determined by the parameters that are passed in through registers. For ACRN, Hypervisor will simulate SMC by hypercall to switch vCPU State between Normal World and Secure World. There are 4 registers(RDI, RSI, RDX, RBX) reserved for paramters passing between Normal World and Secure World. Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-03-27 17:26:38 +08:00
}
/* Update world index */
arch_vcpu->cur_context = next_world;
}
trusty: implement hypercall to initialize trusty UOS_Loader will trigger boot of Trusty-OS by HC_INITIALIZE_TRUSTY. UOS_Loader will load trusty image and alloc runtime memory for trusty. UOS_Loader will transfer these information include trusty runtime memory base address, entry address and memory size to hypervisor by trusty_boot_param structure. In hypervisor, once HC_INITIALIZE_TRUSTY received, it will create EPT for Secure World, save Normal World vCPU context, init Secure World vCPU context and switch World state to Secure World. Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-03-27 17:27:51 +08:00
/* Put key_info and trusty_startup_param in the first Page of Trusty
* runtime memory
*/
trusty: add key_info for trusty bring-up For trusty bring-up, key_info is needed. Currently, bootloader did not transfer key_info to hypervisor. So in this patch, use dummy key_info temporarily. Derive vSeed from dSeed before trusty startup, the vSeed will bind with UUID of each VM. Remove key_info from sworld_control structure. Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-03-27 17:28:51 +08:00
static bool setup_trusty_info(struct vcpu *vcpu,
trusty: implement hypercall to initialize trusty UOS_Loader will trigger boot of Trusty-OS by HC_INITIALIZE_TRUSTY. UOS_Loader will load trusty image and alloc runtime memory for trusty. UOS_Loader will transfer these information include trusty runtime memory base address, entry address and memory size to hypervisor by trusty_boot_param structure. In hypervisor, once HC_INITIALIZE_TRUSTY received, it will create EPT for Secure World, save Normal World vCPU context, init Secure World vCPU context and switch World state to Secure World. Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-03-27 17:27:51 +08:00
uint32_t mem_size, uint64_t mem_base_hpa)
{
trusty: add key_info for trusty bring-up For trusty bring-up, key_info is needed. Currently, bootloader did not transfer key_info to hypervisor. So in this patch, use dummy key_info temporarily. Derive vSeed from dSeed before trusty startup, the vSeed will bind with UUID of each VM. Remove key_info from sworld_control structure. Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-03-27 17:28:51 +08:00
uint32_t i;
trusty: implement hypercall to initialize trusty UOS_Loader will trigger boot of Trusty-OS by HC_INITIALIZE_TRUSTY. UOS_Loader will load trusty image and alloc runtime memory for trusty. UOS_Loader will transfer these information include trusty runtime memory base address, entry address and memory size to hypervisor by trusty_boot_param structure. In hypervisor, once HC_INITIALIZE_TRUSTY received, it will create EPT for Secure World, save Normal World vCPU context, init Secure World vCPU context and switch World state to Secure World. Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-03-27 17:27:51 +08:00
struct trusty_mem *mem;
HV: treewide: give names to unnamed structs/unions According to the syntax defined in C99, each struct/union field must have an identifier. This patch adds names to the previously unnamed fields for C99 compatibility. Here is a summary of the names (marked with a pair of *stars*) added. struct trusty_mem: union { struct { struct key_info key_info; struct trusty_startup_param startup_param; } *data*; uint8_t page[CPU_PAGE_SIZE]; } first_page; struct ptdev_remapping_info: union { struct ptdev_msi_info msi; struct ptdev_intx_info intx; } *ptdev_intr_info*; union code_segment_descriptor: uint64_t value; struct { union { ... } low32; union { ... } high32; } *fields*; similar changes are made to the following structures. * union data_segment_descriptor, * union system_segment_descriptor, * union tss_64_descriptor, and * union idt_64_descriptor struct trace_entry: union { struct { uint32_t a, b, c, d; } *fields_32*; struct { uint8_t a1, a2, a3, a4; uint8_t b1, b2, b3, b4; uint8_t c1, c2, c3, c4; uint8_t d1, d2, d3, d4; } *fields_8*; struct { uint64_t e; uint64_t f; } *fields_64*; char str[16]; } *payload*; Signed-off-by: Junjie Mao <junjie.mao@intel.com> Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-28 23:22:49 +08:00
struct key_info *key_info;
trusty: implement hypercall to initialize trusty UOS_Loader will trigger boot of Trusty-OS by HC_INITIALIZE_TRUSTY. UOS_Loader will load trusty image and alloc runtime memory for trusty. UOS_Loader will transfer these information include trusty runtime memory base address, entry address and memory size to hypervisor by trusty_boot_param structure. In hypervisor, once HC_INITIALIZE_TRUSTY received, it will create EPT for Secure World, save Normal World vCPU context, init Secure World vCPU context and switch World state to Secure World. Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-03-27 17:27:51 +08:00
mem = (struct trusty_mem *)(HPA2HVA(mem_base_hpa));
trusty: add key_info for trusty bring-up For trusty bring-up, key_info is needed. Currently, bootloader did not transfer key_info to hypervisor. So in this patch, use dummy key_info temporarily. Derive vSeed from dSeed before trusty startup, the vSeed will bind with UUID of each VM. Remove key_info from sworld_control structure. Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-03-27 17:28:51 +08:00
/* copy key_info to the first page of trusty memory */
HV: treewide: give names to unnamed structs/unions According to the syntax defined in C99, each struct/union field must have an identifier. This patch adds names to the previously unnamed fields for C99 compatibility. Here is a summary of the names (marked with a pair of *stars*) added. struct trusty_mem: union { struct { struct key_info key_info; struct trusty_startup_param startup_param; } *data*; uint8_t page[CPU_PAGE_SIZE]; } first_page; struct ptdev_remapping_info: union { struct ptdev_msi_info msi; struct ptdev_intx_info intx; } *ptdev_intr_info*; union code_segment_descriptor: uint64_t value; struct { union { ... } low32; union { ... } high32; } *fields*; similar changes are made to the following structures. * union data_segment_descriptor, * union system_segment_descriptor, * union tss_64_descriptor, and * union idt_64_descriptor struct trace_entry: union { struct { uint32_t a, b, c, d; } *fields_32*; struct { uint8_t a1, a2, a3, a4; uint8_t b1, b2, b3, b4; uint8_t c1, c2, c3, c4; uint8_t d1, d2, d3, d4; } *fields_8*; struct { uint64_t e; uint64_t f; } *fields_64*; char str[16]; } *payload*; Signed-off-by: Junjie Mao <junjie.mao@intel.com> Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-28 23:22:49 +08:00
memcpy_s(&mem->first_page.data.key_info, sizeof(g_key_info),
Fix compile error caused by missing memcpy function On some toolchain configurations direct struct assignments will default to a memcpy operation which is not present in this environment, so explicitly use the internal memcpy_s function. Signed-of-by: Rusty Lynch <rusty.lynch@intel.com>
2018-03-30 05:02:45 +08:00
&g_key_info, sizeof(g_key_info));
trusty: add key_info for trusty bring-up For trusty bring-up, key_info is needed. Currently, bootloader did not transfer key_info to hypervisor. So in this patch, use dummy key_info temporarily. Derive vSeed from dSeed before trusty startup, the vSeed will bind with UUID of each VM. Remove key_info from sworld_control structure. Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-03-27 17:28:51 +08:00
HV: treewide: give names to unnamed structs/unions According to the syntax defined in C99, each struct/union field must have an identifier. This patch adds names to the previously unnamed fields for C99 compatibility. Here is a summary of the names (marked with a pair of *stars*) added. struct trusty_mem: union { struct { struct key_info key_info; struct trusty_startup_param startup_param; } *data*; uint8_t page[CPU_PAGE_SIZE]; } first_page; struct ptdev_remapping_info: union { struct ptdev_msi_info msi; struct ptdev_intx_info intx; } *ptdev_intr_info*; union code_segment_descriptor: uint64_t value; struct { union { ... } low32; union { ... } high32; } *fields*; similar changes are made to the following structures. * union data_segment_descriptor, * union system_segment_descriptor, * union tss_64_descriptor, and * union idt_64_descriptor struct trace_entry: union { struct { uint32_t a, b, c, d; } *fields_32*; struct { uint8_t a1, a2, a3, a4; uint8_t b1, b2, b3, b4; uint8_t c1, c2, c3, c4; uint8_t d1, d2, d3, d4; } *fields_8*; struct { uint64_t e; uint64_t f; } *fields_64*; char str[16]; } *payload*; Signed-off-by: Junjie Mao <junjie.mao@intel.com> Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-28 23:22:49 +08:00
memset(mem->first_page.data.key_info.dseed_list, 0,
sizeof(mem->first_page.data.key_info.dseed_list));
trusty: add key_info for trusty bring-up For trusty bring-up, key_info is needed. Currently, bootloader did not transfer key_info to hypervisor. So in this patch, use dummy key_info temporarily. Derive vSeed from dSeed before trusty startup, the vSeed will bind with UUID of each VM. Remove key_info from sworld_control structure. Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-03-27 17:28:51 +08:00
/* Derive dvseed from dseed for Trusty */
HV: treewide: give names to unnamed structs/unions According to the syntax defined in C99, each struct/union field must have an identifier. This patch adds names to the previously unnamed fields for C99 compatibility. Here is a summary of the names (marked with a pair of *stars*) added. struct trusty_mem: union { struct { struct key_info key_info; struct trusty_startup_param startup_param; } *data*; uint8_t page[CPU_PAGE_SIZE]; } first_page; struct ptdev_remapping_info: union { struct ptdev_msi_info msi; struct ptdev_intx_info intx; } *ptdev_intr_info*; union code_segment_descriptor: uint64_t value; struct { union { ... } low32; union { ... } high32; } *fields*; similar changes are made to the following structures. * union data_segment_descriptor, * union system_segment_descriptor, * union tss_64_descriptor, and * union idt_64_descriptor struct trace_entry: union { struct { uint32_t a, b, c, d; } *fields_32*; struct { uint8_t a1, a2, a3, a4; uint8_t b1, b2, b3, b4; uint8_t c1, c2, c3, c4; uint8_t d1, d2, d3, d4; } *fields_8*; struct { uint64_t e; uint64_t f; } *fields_64*; char str[16]; } *payload*; Signed-off-by: Junjie Mao <junjie.mao@intel.com> Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-28 23:22:49 +08:00
key_info = &mem->first_page.data.key_info;
trusty: add key_info for trusty bring-up For trusty bring-up, key_info is needed. Currently, bootloader did not transfer key_info to hypervisor. So in this patch, use dummy key_info temporarily. Derive vSeed from dSeed before trusty startup, the vSeed will bind with UUID of each VM. Remove key_info from sworld_control structure. Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-03-27 17:28:51 +08:00
for (i = 0; i < g_key_info.num_seeds; i++) {
HV:treewide:fix "expression is not Boolean" MISRA C explicit required expression should be boolean when in branch statements (if,while...). Signed-off-by: Huihuang Shi <huihuang.shi@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-20 13:28:25 +08:00
if (hkdf_sha256(key_info->dseed_list[i].seed,
trusty: add key_info for trusty bring-up For trusty bring-up, key_info is needed. Currently, bootloader did not transfer key_info to hypervisor. So in this patch, use dummy key_info temporarily. Derive vSeed from dSeed before trusty startup, the vSeed will bind with UUID of each VM. Remove key_info from sworld_control structure. Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-03-27 17:28:51 +08:00
BUP_MKHI_BOOTLOADER_SEED_LEN,
g_key_info.dseed_list[i].seed,
BUP_MKHI_BOOTLOADER_SEED_LEN,
NULL, 0,
HV:treewide:fix "expression is not Boolean" MISRA C explicit required expression should be boolean when in branch statements (if,while...). Signed-off-by: Huihuang Shi <huihuang.shi@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-20 13:28:25 +08:00
vcpu->vm->GUID, sizeof(vcpu->vm->GUID)) == 0) {
HV: treewide: give names to unnamed structs/unions According to the syntax defined in C99, each struct/union field must have an identifier. This patch adds names to the previously unnamed fields for C99 compatibility. Here is a summary of the names (marked with a pair of *stars*) added. struct trusty_mem: union { struct { struct key_info key_info; struct trusty_startup_param startup_param; } *data*; uint8_t page[CPU_PAGE_SIZE]; } first_page; struct ptdev_remapping_info: union { struct ptdev_msi_info msi; struct ptdev_intx_info intx; } *ptdev_intr_info*; union code_segment_descriptor: uint64_t value; struct { union { ... } low32; union { ... } high32; } *fields*; similar changes are made to the following structures. * union data_segment_descriptor, * union system_segment_descriptor, * union tss_64_descriptor, and * union idt_64_descriptor struct trace_entry: union { struct { uint32_t a, b, c, d; } *fields_32*; struct { uint8_t a1, a2, a3, a4; uint8_t b1, b2, b3, b4; uint8_t c1, c2, c3, c4; uint8_t d1, d2, d3, d4; } *fields_8*; struct { uint64_t e; uint64_t f; } *fields_64*; char str[16]; } *payload*; Signed-off-by: Junjie Mao <junjie.mao@intel.com> Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-28 23:22:49 +08:00
memset(key_info, 0, sizeof(struct key_info));
trusty: add key_info for trusty bring-up For trusty bring-up, key_info is needed. Currently, bootloader did not transfer key_info to hypervisor. So in this patch, use dummy key_info temporarily. Derive vSeed from dSeed before trusty startup, the vSeed will bind with UUID of each VM. Remove key_info from sworld_control structure. Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-03-27 17:28:51 +08:00
pr_err("%s: derive dvseed failed!", __func__);
return false;
}
}
trusty: fix typo of comments Remove TODO comments since it has been done below the comments. Typo fix: startup_info --> startup_param. Signed-off-by: Qi Yadong <yadong.qi@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-03-30 12:50:40 +08:00
/* Prepare trusty startup param */
HV: treewide: give names to unnamed structs/unions According to the syntax defined in C99, each struct/union field must have an identifier. This patch adds names to the previously unnamed fields for C99 compatibility. Here is a summary of the names (marked with a pair of *stars*) added. struct trusty_mem: union { struct { struct key_info key_info; struct trusty_startup_param startup_param; } *data*; uint8_t page[CPU_PAGE_SIZE]; } first_page; struct ptdev_remapping_info: union { struct ptdev_msi_info msi; struct ptdev_intx_info intx; } *ptdev_intr_info*; union code_segment_descriptor: uint64_t value; struct { union { ... } low32; union { ... } high32; } *fields*; similar changes are made to the following structures. * union data_segment_descriptor, * union system_segment_descriptor, * union tss_64_descriptor, and * union idt_64_descriptor struct trace_entry: union { struct { uint32_t a, b, c, d; } *fields_32*; struct { uint8_t a1, a2, a3, a4; uint8_t b1, b2, b3, b4; uint8_t c1, c2, c3, c4; uint8_t d1, d2, d3, d4; } *fields_8*; struct { uint64_t e; uint64_t f; } *fields_64*; char str[16]; } *payload*; Signed-off-by: Junjie Mao <junjie.mao@intel.com> Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-28 23:22:49 +08:00
mem->first_page.data.startup_param.size_of_this_struct =
trusty: implement hypercall to initialize trusty UOS_Loader will trigger boot of Trusty-OS by HC_INITIALIZE_TRUSTY. UOS_Loader will load trusty image and alloc runtime memory for trusty. UOS_Loader will transfer these information include trusty runtime memory base address, entry address and memory size to hypervisor by trusty_boot_param structure. In hypervisor, once HC_INITIALIZE_TRUSTY received, it will create EPT for Secure World, save Normal World vCPU context, init Secure World vCPU context and switch World state to Secure World. Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-03-27 17:27:51 +08:00
sizeof(struct trusty_startup_param);
HV: treewide: give names to unnamed structs/unions According to the syntax defined in C99, each struct/union field must have an identifier. This patch adds names to the previously unnamed fields for C99 compatibility. Here is a summary of the names (marked with a pair of *stars*) added. struct trusty_mem: union { struct { struct key_info key_info; struct trusty_startup_param startup_param; } *data*; uint8_t page[CPU_PAGE_SIZE]; } first_page; struct ptdev_remapping_info: union { struct ptdev_msi_info msi; struct ptdev_intx_info intx; } *ptdev_intr_info*; union code_segment_descriptor: uint64_t value; struct { union { ... } low32; union { ... } high32; } *fields*; similar changes are made to the following structures. * union data_segment_descriptor, * union system_segment_descriptor, * union tss_64_descriptor, and * union idt_64_descriptor struct trace_entry: union { struct { uint32_t a, b, c, d; } *fields_32*; struct { uint8_t a1, a2, a3, a4; uint8_t b1, b2, b3, b4; uint8_t c1, c2, c3, c4; uint8_t d1, d2, d3, d4; } *fields_8*; struct { uint64_t e; uint64_t f; } *fields_64*; char str[16]; } *payload*; Signed-off-by: Junjie Mao <junjie.mao@intel.com> Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-28 23:22:49 +08:00
mem->first_page.data.startup_param.mem_size = mem_size;
mem->first_page.data.startup_param.tsc_per_ms = CYCLES_PER_MS;
mem->first_page.data.startup_param.trusty_mem_base =
TRUSTY_EPT_REBASE_GPA;
trusty: implement hypercall to initialize trusty UOS_Loader will trigger boot of Trusty-OS by HC_INITIALIZE_TRUSTY. UOS_Loader will load trusty image and alloc runtime memory for trusty. UOS_Loader will transfer these information include trusty runtime memory base address, entry address and memory size to hypervisor by trusty_boot_param structure. In hypervisor, once HC_INITIALIZE_TRUSTY received, it will create EPT for Secure World, save Normal World vCPU context, init Secure World vCPU context and switch World state to Secure World. Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-03-27 17:27:51 +08:00
/* According to trusty boot protocol, it will use RDI as the
* address(GPA) of startup_param on boot. Currently, the startup_param
* is put in the first page of trusty memory just followed by key_info.
*/
vcpu->arch_vcpu.contexts[SECURE_WORLD].guest_cpu_regs.regs.rdi
= (uint64_t)TRUSTY_EPT_REBASE_GPA + sizeof(struct key_info);
trusty: add key_info for trusty bring-up For trusty bring-up, key_info is needed. Currently, bootloader did not transfer key_info to hypervisor. So in this patch, use dummy key_info temporarily. Derive vSeed from dSeed before trusty startup, the vSeed will bind with UUID of each VM. Remove key_info from sworld_control structure. Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-03-27 17:28:51 +08:00
return true;
trusty: implement hypercall to initialize trusty UOS_Loader will trigger boot of Trusty-OS by HC_INITIALIZE_TRUSTY. UOS_Loader will load trusty image and alloc runtime memory for trusty. UOS_Loader will transfer these information include trusty runtime memory base address, entry address and memory size to hypervisor by trusty_boot_param structure. In hypervisor, once HC_INITIALIZE_TRUSTY received, it will create EPT for Secure World, save Normal World vCPU context, init Secure World vCPU context and switch World state to Secure World. Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-03-27 17:27:51 +08:00
}
/* Secure World will reuse environment of UOS_Loder since they are
* both booting from and running in 64bit mode, except GP registers.
* RIP, RSP and RDI are specified below, other GP registers are leaved
* as 0.
*/
trusty: add key_info for trusty bring-up For trusty bring-up, key_info is needed. Currently, bootloader did not transfer key_info to hypervisor. So in this patch, use dummy key_info temporarily. Derive vSeed from dSeed before trusty startup, the vSeed will bind with UUID of each VM. Remove key_info from sworld_control structure. Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-03-27 17:28:51 +08:00
static bool init_secure_world_env(struct vcpu *vcpu,
trusty: implement hypercall to initialize trusty UOS_Loader will trigger boot of Trusty-OS by HC_INITIALIZE_TRUSTY. UOS_Loader will load trusty image and alloc runtime memory for trusty. UOS_Loader will transfer these information include trusty runtime memory base address, entry address and memory size to hypervisor by trusty_boot_param structure. In hypervisor, once HC_INITIALIZE_TRUSTY received, it will create EPT for Secure World, save Normal World vCPU context, init Secure World vCPU context and switch World state to Secure World. Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-03-27 17:27:51 +08:00
uint64_t entry_gpa,
uint64_t base_hpa,
uint32_t size)
{
vcpu->arch_vcpu.inst_len = 0;
vcpu->arch_vcpu.contexts[SECURE_WORLD].rip = entry_gpa;
vcpu->arch_vcpu.contexts[SECURE_WORLD].rsp =
TRUSTY_EPT_REBASE_GPA + size;
trusty: initialize tsc_offset to zero Per trusty design, trusty requires a monotonic increasing secure tick(TSC) at run time. This secure tick will used to mitigate password/pin force attack, control key expiration, etc. Currently, the TSC_OFFSET is enabled. And guest will got (host_tsc + tsc_offset) when execute rdtsc/rdtscp/rdmsr to aquire tsc value. The host_tsc is always keeping increasing during the runtime. So initialize tsc_offset of trusty to 0 will ensure the secure tick feature. Signed-off-by: Qi Yadong <yadong.qi@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-04-04 14:42:01 +08:00
vcpu->arch_vcpu.contexts[SECURE_WORLD].tsc_offset = 0;
hv: copy cr0/4 value when init secure world Copy CR0 / CR4 value from normal world context to secure world context when init secure world. Signed-off-by: Binbin Wu <binbin.wu@intel.com> Acked-by: Wang Kai <kai.z.wang@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-01 14:47:49 +08:00
vcpu->arch_vcpu.contexts[SECURE_WORLD].cr0 =
hv: add context->vmx_ia32_pat to save and restore VMCS Similar to cr0/4: - use context->vmx_ia32_pat to save/restore VMX_GUEST_IA32_PAT field - use context->ia32_pat to keep track the guest' view of IA32_PAT MSR Signed-off-by: Zide Chen <zide.chen@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-22 07:51:21 +08:00
vcpu->arch_vcpu.contexts[NORMAL_WORLD].cr0;
hv: copy cr0/4 value when init secure world Copy CR0 / CR4 value from normal world context to secure world context when init secure world. Signed-off-by: Binbin Wu <binbin.wu@intel.com> Acked-by: Wang Kai <kai.z.wang@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-01 14:47:49 +08:00
vcpu->arch_vcpu.contexts[SECURE_WORLD].cr4 =
hv: add context->vmx_ia32_pat to save and restore VMCS Similar to cr0/4: - use context->vmx_ia32_pat to save/restore VMX_GUEST_IA32_PAT field - use context->ia32_pat to keep track the guest' view of IA32_PAT MSR Signed-off-by: Zide Chen <zide.chen@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-22 07:51:21 +08:00
vcpu->arch_vcpu.contexts[NORMAL_WORLD].cr4;
trusty: init & switch world fix - when init, cr0 & cr4 should read from VMCS - when world switch, cr0/cr4 read shadow should also be save/restore v2: - use context->vmx_cr0/cr4 to save/restore VMX_GUEST_CR0/CR4 - use context->cr0/cr4 to save/restore VMX_CR0/CR4_READ_SHADOW Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com> Acked-by: Anthony Xu <anthony.xu@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-16 14:46:51 +08:00
vcpu->arch_vcpu.contexts[SECURE_WORLD].vmx_cr0 =
hv: add context->vmx_ia32_pat to save and restore VMCS Similar to cr0/4: - use context->vmx_ia32_pat to save/restore VMX_GUEST_IA32_PAT field - use context->ia32_pat to keep track the guest' view of IA32_PAT MSR Signed-off-by: Zide Chen <zide.chen@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-22 07:51:21 +08:00
vcpu->arch_vcpu.contexts[NORMAL_WORLD].vmx_cr0;
trusty: init & switch world fix - when init, cr0 & cr4 should read from VMCS - when world switch, cr0/cr4 read shadow should also be save/restore v2: - use context->vmx_cr0/cr4 to save/restore VMX_GUEST_CR0/CR4 - use context->cr0/cr4 to save/restore VMX_CR0/CR4_READ_SHADOW Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com> Acked-by: Anthony Xu <anthony.xu@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-16 14:46:51 +08:00
vcpu->arch_vcpu.contexts[SECURE_WORLD].vmx_cr4 =
hv: add context->vmx_ia32_pat to save and restore VMCS Similar to cr0/4: - use context->vmx_ia32_pat to save/restore VMX_GUEST_IA32_PAT field - use context->ia32_pat to keep track the guest' view of IA32_PAT MSR Signed-off-by: Zide Chen <zide.chen@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-22 07:51:21 +08:00
vcpu->arch_vcpu.contexts[NORMAL_WORLD].vmx_cr4;
vcpu->arch_vcpu.contexts[SECURE_WORLD].ia32_pat =
vcpu->arch_vcpu.contexts[NORMAL_WORLD].ia32_pat;
vcpu->arch_vcpu.contexts[SECURE_WORLD].vmx_ia32_pat =
vcpu->arch_vcpu.contexts[NORMAL_WORLD].vmx_ia32_pat;
hv: copy cr0/4 value when init secure world Copy CR0 / CR4 value from normal world context to secure world context when init secure world. Signed-off-by: Binbin Wu <binbin.wu@intel.com> Acked-by: Wang Kai <kai.z.wang@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-01 14:47:49 +08:00
trusty: implement hypercall to initialize trusty UOS_Loader will trigger boot of Trusty-OS by HC_INITIALIZE_TRUSTY. UOS_Loader will load trusty image and alloc runtime memory for trusty. UOS_Loader will transfer these information include trusty runtime memory base address, entry address and memory size to hypervisor by trusty_boot_param structure. In hypervisor, once HC_INITIALIZE_TRUSTY received, it will create EPT for Secure World, save Normal World vCPU context, init Secure World vCPU context and switch World state to Secure World. Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-03-27 17:27:51 +08:00
exec_vmwrite(VMX_GUEST_RSP,
TRUSTY_EPT_REBASE_GPA + size);
trusty: initialize tsc_offset to zero Per trusty design, trusty requires a monotonic increasing secure tick(TSC) at run time. This secure tick will used to mitigate password/pin force attack, control key expiration, etc. Currently, the TSC_OFFSET is enabled. And guest will got (host_tsc + tsc_offset) when execute rdtsc/rdtscp/rdmsr to aquire tsc value. The host_tsc is always keeping increasing during the runtime. So initialize tsc_offset of trusty to 0 will ensure the secure tick feature. Signed-off-by: Qi Yadong <yadong.qi@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-04-04 14:42:01 +08:00
exec_vmwrite(VMX_TSC_OFFSET_FULL,
vcpu->arch_vcpu.contexts[SECURE_WORLD].tsc_offset);
trusty: implement hypercall to initialize trusty UOS_Loader will trigger boot of Trusty-OS by HC_INITIALIZE_TRUSTY. UOS_Loader will load trusty image and alloc runtime memory for trusty. UOS_Loader will transfer these information include trusty runtime memory base address, entry address and memory size to hypervisor by trusty_boot_param structure. In hypervisor, once HC_INITIALIZE_TRUSTY received, it will create EPT for Secure World, save Normal World vCPU context, init Secure World vCPU context and switch World state to Secure World. Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-03-27 17:27:51 +08:00
trusty: add key_info for trusty bring-up For trusty bring-up, key_info is needed. Currently, bootloader did not transfer key_info to hypervisor. So in this patch, use dummy key_info temporarily. Derive vSeed from dSeed before trusty startup, the vSeed will bind with UUID of each VM. Remove key_info from sworld_control structure. Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-03-27 17:28:51 +08:00
return setup_trusty_info(vcpu, size, base_hpa);
trusty: implement hypercall to initialize trusty UOS_Loader will trigger boot of Trusty-OS by HC_INITIALIZE_TRUSTY. UOS_Loader will load trusty image and alloc runtime memory for trusty. UOS_Loader will transfer these information include trusty runtime memory base address, entry address and memory size to hypervisor by trusty_boot_param structure. In hypervisor, once HC_INITIALIZE_TRUSTY received, it will create EPT for Secure World, save Normal World vCPU context, init Secure World vCPU context and switch World state to Secure World. Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-03-27 17:27:51 +08:00
}
bool initialize_trusty(struct vcpu *vcpu, uint64_t param)
{
uint64_t trusty_entry_gpa, trusty_base_gpa, trusty_base_hpa;
struct vm *vm = vcpu->vm;
struct trusty_boot_param *boot_param =
(struct trusty_boot_param *)(gpa2hpa(vm, param));
if (sizeof(struct trusty_boot_param) !=
boot_param->size_of_this_struct) {
pr_err("%s: sizeof(struct trusty_boot_param) mismatch!\n",
__func__);
return false;
}
if (boot_param->version != TRUSTY_VERSION) {
pr_err("%s: version of(trusty_boot_param) mismatch!\n",
__func__);
return false;
}
HV:treewide:fix "expression is not Boolean" MISRA C explicit required expression should be boolean when in branch statements (if,while...). Signed-off-by: Huihuang Shi <huihuang.shi@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-20 13:28:25 +08:00
if (boot_param->entry_point == 0) {
trusty: implement hypercall to initialize trusty UOS_Loader will trigger boot of Trusty-OS by HC_INITIALIZE_TRUSTY. UOS_Loader will load trusty image and alloc runtime memory for trusty. UOS_Loader will transfer these information include trusty runtime memory base address, entry address and memory size to hypervisor by trusty_boot_param structure. In hypervisor, once HC_INITIALIZE_TRUSTY received, it will create EPT for Secure World, save Normal World vCPU context, init Secure World vCPU context and switch World state to Secure World. Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-03-27 17:27:51 +08:00
pr_err("%s: Invalid entry point\n", __func__);
return false;
}
HV:treewide:fix "expression is not Boolean" MISRA C explicit required expression should be boolean when in branch statements (if,while...). Signed-off-by: Huihuang Shi <huihuang.shi@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-20 13:28:25 +08:00
if (boot_param->base_addr == 0) {
trusty: implement hypercall to initialize trusty UOS_Loader will trigger boot of Trusty-OS by HC_INITIALIZE_TRUSTY. UOS_Loader will load trusty image and alloc runtime memory for trusty. UOS_Loader will transfer these information include trusty runtime memory base address, entry address and memory size to hypervisor by trusty_boot_param structure. In hypervisor, once HC_INITIALIZE_TRUSTY received, it will create EPT for Secure World, save Normal World vCPU context, init Secure World vCPU context and switch World state to Secure World. Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-03-27 17:27:51 +08:00
pr_err("%s: Invalid memory base address\n", __func__);
return false;
}
trusty_entry_gpa = (uint64_t)boot_param->entry_point;
trusty_base_gpa = (uint64_t)boot_param->base_addr;
create_secure_world_ept(vm, trusty_base_gpa, boot_param->mem_size,
TRUSTY_EPT_REBASE_GPA);
trusty_base_hpa = vm->sworld_control.sworld_memory.base_hpa;
exec_vmwrite64(VMX_EPT_POINTER_FULL,
HV: treewide: convert hexadecimals used in bitops to unsigned Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2018-06-19 18:33:58 +08:00
vm->arch_vm.sworld_eptp | (3UL<<3) | 6UL);
trusty: implement hypercall to initialize trusty UOS_Loader will trigger boot of Trusty-OS by HC_INITIALIZE_TRUSTY. UOS_Loader will load trusty image and alloc runtime memory for trusty. UOS_Loader will transfer these information include trusty runtime memory base address, entry address and memory size to hypervisor by trusty_boot_param structure. In hypervisor, once HC_INITIALIZE_TRUSTY received, it will create EPT for Secure World, save Normal World vCPU context, init Secure World vCPU context and switch World state to Secure World. Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-03-27 17:27:51 +08:00
/* save Normal World context */
save_world_ctx(&vcpu->arch_vcpu.contexts[NORMAL_WORLD]);
/* init secure world environment */
trusty: add key_info for trusty bring-up For trusty bring-up, key_info is needed. Currently, bootloader did not transfer key_info to hypervisor. So in this patch, use dummy key_info temporarily. Derive vSeed from dSeed before trusty startup, the vSeed will bind with UUID of each VM. Remove key_info from sworld_control structure. Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-03-27 17:28:51 +08:00
if (init_secure_world_env(vcpu,
trusty: implement hypercall to initialize trusty UOS_Loader will trigger boot of Trusty-OS by HC_INITIALIZE_TRUSTY. UOS_Loader will load trusty image and alloc runtime memory for trusty. UOS_Loader will transfer these information include trusty runtime memory base address, entry address and memory size to hypervisor by trusty_boot_param structure. In hypervisor, once HC_INITIALIZE_TRUSTY received, it will create EPT for Secure World, save Normal World vCPU context, init Secure World vCPU context and switch World state to Secure World. Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-03-27 17:27:51 +08:00
trusty_entry_gpa - trusty_base_gpa + TRUSTY_EPT_REBASE_GPA,
trusty: add key_info for trusty bring-up For trusty bring-up, key_info is needed. Currently, bootloader did not transfer key_info to hypervisor. So in this patch, use dummy key_info temporarily. Derive vSeed from dSeed before trusty startup, the vSeed will bind with UUID of each VM. Remove key_info from sworld_control structure. Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-03-27 17:28:51 +08:00
trusty_base_hpa, boot_param->mem_size)) {
trusty: implement hypercall to initialize trusty UOS_Loader will trigger boot of Trusty-OS by HC_INITIALIZE_TRUSTY. UOS_Loader will load trusty image and alloc runtime memory for trusty. UOS_Loader will transfer these information include trusty runtime memory base address, entry address and memory size to hypervisor by trusty_boot_param structure. In hypervisor, once HC_INITIALIZE_TRUSTY received, it will create EPT for Secure World, save Normal World vCPU context, init Secure World vCPU context and switch World state to Secure World. Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-03-27 17:27:51 +08:00
trusty: add key_info for trusty bring-up For trusty bring-up, key_info is needed. Currently, bootloader did not transfer key_info to hypervisor. So in this patch, use dummy key_info temporarily. Derive vSeed from dSeed before trusty startup, the vSeed will bind with UUID of each VM. Remove key_info from sworld_control structure. Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-03-27 17:28:51 +08:00
/* switch to Secure World */
vcpu->arch_vcpu.cur_context = SECURE_WORLD;
return true;
}
trusty: implement hypercall to initialize trusty UOS_Loader will trigger boot of Trusty-OS by HC_INITIALIZE_TRUSTY. UOS_Loader will load trusty image and alloc runtime memory for trusty. UOS_Loader will transfer these information include trusty runtime memory base address, entry address and memory size to hypervisor by trusty_boot_param structure. In hypervisor, once HC_INITIALIZE_TRUSTY received, it will create EPT for Secure World, save Normal World vCPU context, init Secure World vCPU context and switch World state to Secure World. Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-03-27 17:27:51 +08:00
trusty: add key_info for trusty bring-up For trusty bring-up, key_info is needed. Currently, bootloader did not transfer key_info to hypervisor. So in this patch, use dummy key_info temporarily. Derive vSeed from dSeed before trusty startup, the vSeed will bind with UUID of each VM. Remove key_info from sworld_control structure. Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-03-27 17:28:51 +08:00
return false;
trusty: implement hypercall to initialize trusty UOS_Loader will trigger boot of Trusty-OS by HC_INITIALIZE_TRUSTY. UOS_Loader will load trusty image and alloc runtime memory for trusty. UOS_Loader will transfer these information include trusty runtime memory base address, entry address and memory size to hypervisor by trusty_boot_param structure. In hypervisor, once HC_INITIALIZE_TRUSTY received, it will create EPT for Secure World, save Normal World vCPU context, init Secure World vCPU context and switch World state to Secure World. Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-03-27 17:27:51 +08:00
}
HV: Parse SeedList HOB Retrieve dseed from SeedList HOB(Hand-Off-Block). SBL passes SeedList HOB to ACRN by MBI modules. Signed-off-by: Qi Yadong <yadong.qi@intel.com> Reviewed-by: Zhu Bing <bing.zhu@intel.com> Reviewed-by: Wang Kai <kai.z.wang@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-05 10:57:34 +08:00
void trusty_set_dseed(void *dseed, uint8_t dseed_num)
{
/* Use fake seed if input param is invalid */
if ((dseed == NULL) || (dseed_num == 0) ||
(dseed_num > BOOTLOADER_SEED_MAX_ENTRIES)) {
g_key_info.num_seeds = 1;
memset(g_key_info.dseed_list[0].seed, 0xA5,
sizeof(g_key_info.dseed_list[0].seed));
return;
}
g_key_info.num_seeds = dseed_num;
memcpy_s(&g_key_info.dseed_list, sizeof(struct seed_info) * dseed_num,
dseed, sizeof(struct seed_info) * dseed_num);
}