2018-03-07 20:57:14 +08:00
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/*
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* Copyright (C) 2018 Intel Corporation. All rights reserved.
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*
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2018-05-26 01:49:13 +08:00
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* SPDX-License-Identifier: BSD-3-Clause
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2018-03-07 20:57:14 +08:00
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*/
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2018-05-22 08:30:50 +08:00
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#include <hypervisor.h>
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2018-03-07 20:57:14 +08:00
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static void set_tss_desc(union tss_64_descriptor *desc,
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void *tss, int tss_limit, int type)
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{
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uint32_t u1, u2, u3;
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u1 = ((uint64_t)tss << 16) & 0xFFFFFFFF;
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u2 = (uint64_t)tss & 0xFF000000;
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u3 = ((uint64_t)tss & 0x00FF0000) >> 16;
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HV: treewide: give names to unnamed structs/unions
According to the syntax defined in C99, each struct/union field must have an
identifier. This patch adds names to the previously unnamed fields for C99
compatibility.
Here is a summary of the names (marked with a pair of *stars*) added.
struct trusty_mem:
union {
struct {
struct key_info key_info;
struct trusty_startup_param startup_param;
} *data*;
uint8_t page[CPU_PAGE_SIZE];
} first_page;
struct ptdev_remapping_info:
union {
struct ptdev_msi_info msi;
struct ptdev_intx_info intx;
} *ptdev_intr_info*;
union code_segment_descriptor:
uint64_t value;
struct {
union {
...
} low32;
union {
...
} high32;
} *fields*;
similar changes are made to the following structures.
* union data_segment_descriptor,
* union system_segment_descriptor,
* union tss_64_descriptor, and
* union idt_64_descriptor
struct trace_entry:
union {
struct {
uint32_t a, b, c, d;
} *fields_32*;
struct {
uint8_t a1, a2, a3, a4;
uint8_t b1, b2, b3, b4;
uint8_t c1, c2, c3, c4;
uint8_t d1, d2, d3, d4;
} *fields_8*;
struct {
uint64_t e;
uint64_t f;
} *fields_64*;
char str[16];
} *payload*;
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-28 23:22:49 +08:00
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desc->fields.low32.value = u1 | (tss_limit & 0xFFFF);
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desc->fields.base_addr_63_32 = (uint32_t)((uint64_t)tss >> 32);
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desc->fields.high32.value = (u2 | ((uint32_t)type << 8) | 0x8000 | u3);
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2018-03-07 20:57:14 +08:00
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}
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void load_gdtr_and_tr(void)
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{
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struct host_gdt *gdt = &get_cpu_var(gdt);
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struct host_gdt_descriptor gdtr;
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struct tss_64 *tss = &get_cpu_var(tss);
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/* first entry is not used */
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gdt->rsvd = 0xAAAAAAAAAAAAAAAA;
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/* ring 0 code sel descriptor */
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gdt->host_gdt_code_descriptor.value = 0x00Af9b000000ffff;
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/* ring 0 data sel descriptor */
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gdt->host_gdt_data_descriptor.value = 0x00cf93000000ffff;
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2018-05-22 23:24:07 +08:00
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tss->ist1 = (uint64_t)get_cpu_var(mc_stack) + CONFIG_STACK_SIZE;
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tss->ist2 = (uint64_t)get_cpu_var(df_stack) + CONFIG_STACK_SIZE;
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tss->ist3 = (uint64_t)get_cpu_var(sf_stack) + CONFIG_STACK_SIZE;
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2018-03-07 20:57:14 +08:00
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tss->ist4 = 0L;
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/* tss descriptor */
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set_tss_desc(&gdt->host_gdt_tss_descriptors,
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(void *)tss, sizeof(struct tss_64), TSS_AVAIL);
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gdtr.len = sizeof(struct host_gdt) - 1;
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gdtr.gdt = gdt;
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asm volatile ("lgdt %0" ::"m"(gdtr));
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CPU_LTR_EXECUTE(HOST_GDT_RING0_CPU_TSS_SEL);
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}
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