2022-04-25 10:24:34 +08:00
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/*
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* Copyright (C) 2022 Intel Corporation.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef VRTC_H
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#define VRTC_H
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typedef int32_t time_t;
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/* Register layout of the RTC */
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struct rtcdev {
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uint8_t sec;
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uint8_t alarm_sec;
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uint8_t min;
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uint8_t alarm_min;
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uint8_t hour;
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uint8_t alarm_hour;
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uint8_t day_of_week;
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uint8_t day_of_month;
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uint8_t month;
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uint8_t year;
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uint8_t reg_a;
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uint8_t reg_b;
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uint8_t reg_c;
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uint8_t reg_d;
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uint8_t res[36];
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uint8_t century;
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};
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struct acrn_vrtc {
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struct acrn_vm *vm;
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uint32_t addr; /* RTC register to read or write */
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time_t base_rtctime; /* Base time calulated from physical rtc register. */
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2022-04-21 15:38:28 +08:00
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time_t offset_rtctime; /* RTC offset against base time. */
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2022-05-09 09:18:35 +08:00
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time_t last_rtctime; /* Last RTC time, to keep monotonicity. */
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2022-04-21 15:38:28 +08:00
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2022-04-25 10:24:34 +08:00
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uint64_t base_tsc; /* Base tsc value */
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struct rtcdev rtcdev; /* RTC register */
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};
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#endif /* VRTC_H */
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