2018-05-30 08:41:52 +08:00
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/*
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* Copyright (C) <2018> Intel Corporation
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef MTRR_H
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#define MTRR_H
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2018-07-18 10:27:04 +08:00
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#define FIXED_RANGE_MTRR_NUM 11U
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#define MTRR_SUB_RANGE_NUM 8U
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2018-05-30 08:41:52 +08:00
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union mtrr_cap_reg {
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uint64_t value;
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struct {
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2018-07-20 16:38:19 +08:00
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uint32_t vcnt:8;
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uint32_t fix:1;
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uint32_t res0:1;
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uint32_t wc:1;
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uint32_t res1:21;
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uint32_t res2:32;
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2018-05-30 08:41:52 +08:00
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} bits;
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};
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union mtrr_def_type_reg {
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uint64_t value;
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struct {
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2018-07-20 16:38:19 +08:00
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uint32_t type:8;
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uint32_t res0:2;
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uint32_t fixed_enable:1;
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uint32_t enable:1;
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uint32_t res1:20;
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uint32_t res2:32;
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2018-05-30 08:41:52 +08:00
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} bits;
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};
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union mtrr_fixed_range_reg {
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uint64_t value;
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uint8_t type[MTRR_SUB_RANGE_NUM];
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};
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struct mtrr_state {
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union mtrr_cap_reg cap;
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union mtrr_def_type_reg def_type;
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union mtrr_fixed_range_reg fixed_range[FIXED_RANGE_MTRR_NUM];
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};
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void mtrr_wrmsr(struct vcpu *vcpu, uint32_t msr, uint64_t value);
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uint64_t mtrr_rdmsr(struct vcpu *vcpu, uint32_t msr);
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void init_mtrr(struct vcpu *vcpu);
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#endif /* MTRR_H */
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