2018-05-22 23:24:07 +08:00
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#include "config.h"
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2018-03-07 20:57:14 +08:00
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ENTRY(cpu_primary_start_32)
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MEMORY
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{
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/* Low 1MB of memory for secondary processor start-up */
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2018-05-03 14:09:19 +08:00
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lowram : ORIGIN = 0, LENGTH = CONFIG_LOW_RAM_SIZE
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2018-03-07 20:57:14 +08:00
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/* 32 MBytes of RAM for HV */
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ram : ORIGIN = CONFIG_RAM_START, LENGTH = CONFIG_RAM_SIZE
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}
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SECTIONS
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{
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.boot :
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{
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_ld_ram_start = . ;
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KEEP(*(multiboot_header)) ;
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} > ram
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.entry :
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{
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KEEP(*(entry)) ;
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} > ram
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.text :
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{
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*(.text .text*) ;
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*(.gnu.linkonce.t*)
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*(.note.gnu.build-id)
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2018-03-12 20:57:44 +08:00
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*(.retpoline_thunk)
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2018-03-07 20:57:14 +08:00
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} > ram
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.rodata :
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{
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*(.rodata*) ;
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} > ram
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2018-06-23 01:25:24 +08:00
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.rela :
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{
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*(.rela*)
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*(.dyn*)
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} > ram
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. = ALIGN(4) ;
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2018-06-11 20:31:25 +08:00
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_ld_trampoline_load = .;
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2018-03-07 20:57:14 +08:00
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2018-06-11 20:31:25 +08:00
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.trampoline : AT (_ld_trampoline_load)
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2018-03-07 20:57:14 +08:00
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{
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2018-06-11 20:31:25 +08:00
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_ld_trampoline_start = .;
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*(.trampoline_reset);
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2018-03-07 20:57:14 +08:00
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. = ALIGN(4);
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2018-06-11 20:31:25 +08:00
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_ld_trampoline_end = .;
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2018-03-07 20:57:14 +08:00
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} > lowram
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2018-06-11 20:31:25 +08:00
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_ld_trampoline_size = _ld_trampoline_end - _ld_trampoline_start;
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2018-03-07 20:57:14 +08:00
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2018-06-11 20:31:25 +08:00
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.data (_ld_trampoline_load + _ld_trampoline_size):
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2018-03-07 20:57:14 +08:00
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{
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*(.data) ;
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*(.data*) ;
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*(.sdata)
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*(.gnu.linkonce.d*)
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} > ram
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.bss_noinit (NOLOAD):
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{
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. = ALIGN(4) ;
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*(.bss_noinit) ;
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*(.bss_noinit*) ;
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. = ALIGN(4) ;
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} > ram
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.bss (NOLOAD):
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{
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. = ALIGN(4) ;
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_ld_bss_start = . ;
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*(.bss) ;
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*(.bss*) ;
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*(COMMON) ;
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. = ALIGN(4) ;
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_ld_bss_end = . ;
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} > ram
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_ld_ram_size = LENGTH(ram) ;
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_ld_ram_end = _ld_ram_size + _ld_ram_start ;
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}
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