acrn-hypervisor/devicemodel/include/rpmb_sim.h

52 lines
2.0 KiB
C
Raw Normal View History

/*
* Copyright (c) 2018 Intel Corporation
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer in
* this position and unchanged.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#ifndef __RPMB_SIM_H__
#define __RPMB_SIM_H__
inline uint32_t swap32(uint32_t val)
{
return ((val & (uint32_t)0x000000ffUL) << 24)
| ((val & (uint32_t)0x0000ff00UL) << 8)
| ((val & (uint32_t)0x00ff0000UL) >> 8)
| ((val & (uint32_t)0xff000000UL) >> 24);
}
inline uint16_t swap16(uint16_t val)
{
return ((val & (uint16_t)0x00ffU) << 8)
| ((val & (uint16_t)0xff00U) >> 8);
}
int rpmb_mac(const uint8_t *key, const struct rpmb_frame *frames,
size_t frame_cnt, uint8_t *mac);
int is_use_sim_rpmb(void);
int rpmb_sim_key_init(uint8_t *key);
int rpmb_sim_send(const void *r);
#endif /* __RPMB_SIM_H__ */